Searched refs:RISCVVType (Results 1 – 11 of 11) sorted by relevance
| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVInsertVSETVLI.cpp | 327 auto [LMul, Fractional] = RISCVVType::decodeVLMUL(LMUL); in isLMUL1OrSmaller() 340 if (RISCVVType::getSEW(CurVType) != RISCVVType::getSEW(NewVType)) in areCompatibleVTYPEs() 344 if (RISCVVType::getSEW(NewVType) < RISCVVType::getSEW(CurVType)) in areCompatibleVTYPEs() 348 if (RISCVVType::getSEW(NewVType) < RISCVVType::getSEW(CurVType) || in areCompatibleVTYPEs() 349 RISCVVType::getSEW(NewVType) >= 64) in areCompatibleVTYPEs() 358 if (RISCVVType::getVLMUL(CurVType) != RISCVVType::getVLMUL(NewVType)) in areCompatibleVTYPEs() 362 if (!isLMUL1OrSmaller(RISCVVType::getVLMUL(NewVType))) in areCompatibleVTYPEs() 368 auto Ratio1 = RISCVVType::getSEWLMULRatio(RISCVVType::getSEW(CurVType), in areCompatibleVTYPEs() 369 RISCVVType::getVLMUL(CurVType)); in areCompatibleVTYPEs() 370 auto Ratio2 = RISCVVType::getSEWLMULRatio(RISCVVType::getSEW(NewVType), in areCompatibleVTYPEs() [all …]
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| HD | RISCVVectorPeephole.cpp | 107 auto LMUL = RISCVVType::decodeVLMUL(RISCVII::getLMul(MI.getDesc().TSFlags)); in convertToVLMAX() 113 assert(RISCVVType::isValidSEW(SEW) && "Unexpected SEW"); in convertToVLMAX()
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| HD | RISCVInstrInfo.cpp | 220 RISCVII::VLMUL FirstLMul = RISCVVType::getVLMUL(FirstVType); in isConvertibleToVMV_V_V() 221 FirstSEW = RISCVVType::getSEW(FirstVType); in isConvertibleToVMV_V_V() 243 if (RISCVVType::getSEW(VType) != FirstSEW) in isConvertibleToVMV_V_V() 248 if (!RISCVVType::isTailAgnostic(VType)) in isConvertibleToVMV_V_V() 256 return LMul == RISCVVType::getVLMUL(VType); in isConvertibleToVMV_V_V() 328 auto [LMulVal, Fractional] = RISCVVType::decodeVLMUL(LMul); in copyPhysRegVector() 398 auto [NumCopied, _] = RISCVVType::decodeVLMUL(LMulCopied); in copyPhysRegVector() 2508 if (!RISCVVType::isValidSEW(SEW)) { in verifyInstruction() 3003 RISCVVType::printVType(Imm, OS); in createMIROperandComment() 3008 assert(RISCVVType::isValidSEW(SEW) && "Unexpected SEW"); in createMIROperandComment()
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| HD | RISCVISelDAGToDAG.cpp | 568 RISCVVType::decodeVSEW(Node->getConstantOperandVal(Offset) & 0x7); in selectVSETVLI() 572 unsigned VTypeI = RISCVVType::encodeVTYPE(VLMul, SEW, /*TailAgnostic*/ true, in selectVSETVLI() 580 if (*VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue()) in selectVSETVLI()
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| HD | RISCVISelLowering.cpp | 2863 RISCVVType::decodeVLMUL(RISCVTargetLowering::getLMUL(VT)); in getLMULCost() 8862 unsigned Sew = RISCVVType::encodeSEW(I32VT.getScalarSizeInBits()); in lowerVectorIntrinsicScalars() 8877 unsigned Sew = RISCVVType::encodeSEW(VT.getScalarSizeInBits()); in lowerVectorIntrinsicScalars() 8972 unsigned VLMUL = (unsigned)RISCVVType::encodeLMUL(LMulVal, Fractional); in lowerGetVectorLength() 8973 unsigned VSEW = RISCVVType::encodeSEW(ElementWidth); in lowerGetVectorLength() 10385 assert(RISCVVType::decodeVLMUL(getLMUL(ContainerSubVecVT)).second || in lowerEXTRACT_SUBVECTOR() 17931 unsigned SEW = RISCVVType::decodeVSEW(VSEW); in computeKnownBitsForTargetNode() 17932 auto [LMul, Fractional] = RISCVVType::decodeVLMUL(VLMUL); in computeKnownBitsForTargetNode() 21651 auto [LMUL, Fractional] = RISCVVType::decodeVLMUL(getLMUL(ContainerVT)); in isLegalInterleavedAccessType()
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| /freebsd-head/contrib/llvm-project/llvm/lib/TargetParser/ |
| HD | RISCVTargetParser.cpp | 149 namespace RISCVVType { namespace 228 unsigned Ratio = RISCVVType::getSEWLMULRatio(SEW, VLMUL); in getSameRatioLMUL() 234 return RISCVVType::encodeLMUL(EMUL, Fractional); in getSameRatioLMUL()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/MCA/ |
| HD | RISCVCustomBehaviour.cpp | 110 RISCVII::VLMUL VLMUL = RISCVVType::getVLMUL(VTypeI); in createInstruments() 142 unsigned SEW = RISCVVType::getSEW(VTypeI); in createInstruments() 202 auto EMUL = RISCVVType::getSameRatioLMUL(SEW, LMUL, EEW); in getEEWAndEMUL()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| HD | RISCVInstPrinter.cpp | 213 if (RISCVVType::getVLMUL(Imm) == RISCVII::VLMUL::LMUL_RESERVED || in printVTypeI() 214 RISCVVType::getSEW(Imm) > 64 || (Imm >> 8) != 0) { in printVTypeI() 219 RISCVVType::printVType(Imm, O); in printVTypeI()
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| /freebsd-head/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
| HD | RISCVTargetParser.h | 70 namespace RISCVVType {
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| HD | RISCVAsmParser.cpp | 1074 RISCVVType::printVType(getVType(), OS); in print() 2183 if (!RISCVVType::isValidSEW(Sew)) in parseVTypeToken() 2193 if (!RISCVVType::isValidLMUL(Lmul, Fractional)) in parseVTypeToken() 2261 RISCVII::VLMUL VLMUL = RISCVVType::encodeLMUL(Lmul, Fractional); in parseVTypeI() 2274 RISCVVType::encodeVTYPE(VLMUL, Sew, TailAgnostic, MaskAgnostic); in parseVTypeI()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Analysis/ |
| HD | ValueTracking.cpp | 1841 uint64_t SEW = RISCVVType::decodeVSEW( in computeKnownBitsFromOperator() 1847 uint64_t MaxVL = MaxVLEN / RISCVVType::getSEWLMULRatio(SEW, VLMUL); in computeKnownBitsFromOperator()
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