| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVSubtarget.cpp | 64 void RISCVSubtarget::anchor() {} in anchor() 66 RISCVSubtarget & 67 RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU, in initializeSubtargetDependencies() 90 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, in RISCVSubtarget() function in RISCVSubtarget 101 const CallLowering *RISCVSubtarget::getCallLowering() const { in getCallLowering() 107 InstructionSelector *RISCVSubtarget::getInstructionSelector() const { in getInstructionSelector() 116 const LegalizerInfo *RISCVSubtarget::getLegalizerInfo() const { in getLegalizerInfo() 122 const RISCVRegisterBankInfo *RISCVSubtarget::getRegBankInfo() const { in getRegBankInfo() 128 bool RISCVSubtarget::useConstantPoolForLargeInts() const { in useConstantPoolForLargeInts() 132 unsigned RISCVSubtarget::getMaxBuildIntsCost() const { in getMaxBuildIntsCost() [all …]
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| HD | RISCVTargetMachine.h | 26 mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap; 35 const RISCVSubtarget *getSubtargetImpl(const Function &F) const override; 39 const RISCVSubtarget *getSubtargetImpl() const = delete;
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| HD | RISCVOptWInstrs.cpp | 69 const RISCVSubtarget &ST, MachineRegisterInfo &MRI); 71 const RISCVSubtarget &ST, MachineRegisterInfo &MRI); 73 const RISCVSubtarget &ST, MachineRegisterInfo &MRI); 120 const RISCVSubtarget &ST, in hasAllNBitUsers() 344 static bool hasAllWUsers(const MachineInstr &OrigMI, const RISCVSubtarget &ST, in hasAllWUsers() 396 static bool isSignExtendedW(Register SrcReg, const RISCVSubtarget &ST, in isSignExtendedW() 632 const RISCVSubtarget &ST, in removeSExtWInstrs() 684 const RISCVSubtarget &ST, in stripWSuffixes() 711 const RISCVSubtarget &ST, in appendWSuffixes() 766 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVMakeCompressible.cpp | 182 const RISCVSubtarget &STI = MI.getMF()->getSubtarget<RISCVSubtarget>(); in isCompressibleLoad() 203 const RISCVSubtarget &STI = MI.getMF()->getSubtarget<RISCVSubtarget>(); in isCompressibleStore() 383 const RISCVSubtarget &STI = Fn.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVFrameLowering.h | 20 class RISCVSubtarget; variable 24 explicit RISCVFrameLowering(const RISCVSubtarget &STI); 84 const RISCVSubtarget &STI;
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| HD | RISCVRegisterInfo.cpp | 61 auto &Subtarget = MF->getSubtarget<RISCVSubtarget>(); in getCalleeSavedRegs() 105 auto &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in getReservedRegs() 166 return !MF.getSubtarget<RISCVSubtarget>().isRegisterReservedByUser(PhysReg); in isAsmClobberable() 185 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in adjustReg() 310 const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>(); in lowerVSPILL() 387 const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>(); in lowerVRELOAD() 460 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in eliminateFrameIndex() 615 auto &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in needsFrameBaseReg() 721 auto &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in getCallPreservedMask() 794 return MF.getSubtarget<RISCVSubtarget>().hasStdExtCOrZca() && in getRegisterCostTableIndex() [all …]
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| HD | RISCV.h | 25 class RISCVSubtarget; variable 84 const RISCVSubtarget &,
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| HD | RISCVExpandAtomicPseudoInsts.cpp | 33 const RISCVSubtarget *STI; 76 STI = &MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() 154 const RISCVSubtarget *Subtarget) { in getLRForRMW32() 176 const RISCVSubtarget *Subtarget) { in getSCForRMW32() 198 const RISCVSubtarget *Subtarget) { in getLRForRMW64() 220 const RISCVSubtarget *Subtarget) { in getSCForRMW64() 242 const RISCVSubtarget *Subtarget) { in getLRForRMW() 251 const RISCVSubtarget *Subtarget) { in getSCForRMW() 264 const RISCVSubtarget *STI) { in doAtomicBinOpExpansion() 328 const RISCVSubtarget *STI) { in doMaskedAtomicBinOpExpansion()
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| HD | RISCVSubtarget.h | 59 class RISCVSubtarget : public RISCVGenSubtargetInfo { 93 RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT, 101 RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,
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| HD | RISCVMachineFunctionInfo.h | 118 MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() && 139 return MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
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| HD | RISCVPushPopOptimizer.cpp | 122 const RISCVSubtarget *Subtarget = &Fn.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVInsertReadWriteCSR.cpp | 177 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVCodeGenPrepare.cpp | 41 const RISCVSubtarget *ST; 206 ST = &TM.getSubtarget<RISCVSubtarget>(F); in runOnFunction()
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| HD | RISCVFrameLowering.cpp | 38 RISCVFrameLowering::RISCVFrameLowering(const RISCVSubtarget &STI) in RISCVFrameLowering() 64 const auto &STI = MF.getSubtarget<RISCVSubtarget>(); in emitSCSPrologue() 126 const auto &STI = MF.getSubtarget<RISCVSubtarget>(); in emitSCSEpilogue() 376 static Register getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; } in getFPReg() 379 static Register getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; } in getSPReg() 1080 const auto &ST = MF.getSubtarget<RISCVSubtarget>(); in assignRVVStackObjectOffsets() 1135 if (!MF.getSubtarget<RISCVSubtarget>().hasVInstructions()) in getScavSlotsNumForRVV() 1177 return MF.getSubtarget<RISCVSubtarget>().hasVInstructions(); in hasRVVFrameObject() 1205 if (MF.getSubtarget<RISCVSubtarget>().hasStdExtCOrZca()) in estimateFunctionSizeInBytes() 1221 MF.getSubtarget<RISCVSubtarget>().getRegisterInfo(); in processFunctionBeforeFrameFinalized() [all …]
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| HD | RISCVInstrInfo.h | 28 class RISCVSubtarget; variable 65 explicit RISCVInstrInfo(RISCVSubtarget &STI); 305 const RISCVSubtarget &STI;
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| HD | RISCVMoveMerger.cpp | 217 const RISCVSubtarget *Subtarget = &Fn.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVExpandPseudoInsts.cpp | 33 const RISCVSubtarget *STI; 70 STI = &MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() 411 const RISCVSubtarget *STI; 465 STI = &MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() 584 const auto &STI = MF->getSubtarget<RISCVSubtarget>(); in expandLoadTLSDescAddress()
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| HD | RISCVVectorPeephole.cpp | 252 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVISelDAGToDAG.h | 25 const RISCVSubtarget *Subtarget = nullptr; 35 Subtarget = &MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| HD | RISCVO0PreLegalizerCombiner.cpp | 45 const RISCVSubtarget &STI; 52 const RISCVSubtarget &STI); 72 const RISCVSubtarget &STI) in RISCVO0PreLegalizerCombinerImpl() 130 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVCallLowering.cpp | 53 const RISCVSubtarget &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in assignArg() 69 Subtarget(MIRBuilder.getMF().getSubtarget<RISCVSubtarget>()) {} in RISCVOutgoingValueHandler() 170 const RISCVSubtarget &Subtarget; 199 const RISCVSubtarget &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in assignArg() 217 Subtarget(MIRBuilder.getMF().getSubtarget<RISCVSubtarget>()) {} in RISCVIncomingValueHandler() 289 const RISCVSubtarget &Subtarget; 321 const RISCVSubtarget &Subtarget) { in isLegalElementTypeForRVV() 342 static bool isSupportedArgumentType(Type *T, const RISCVSubtarget &Subtarget, in isSupportedArgumentType() 361 static bool isSupportedReturnType(Type *T, const RISCVSubtarget &Subtarget, in isSupportedReturnType() 398 const RISCVSubtarget &Subtarget = in lowerReturnVal() [all …]
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| HD | RISCVPreLegalizerCombiner.cpp | 47 const RISCVSubtarget &STI; 54 const RISCVSubtarget &STI, MachineDominatorTree *MDT, 75 const RISCVSubtarget &STI, MachineDominatorTree *MDT, in RISCVPreLegalizerCombinerImpl() 138 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVPostLegalizerCombiner.cpp | 52 const RISCVSubtarget &STI; 59 const RISCVSubtarget &STI, MachineDominatorTree *MDT, 80 const RISCVSubtarget &STI, MachineDominatorTree *MDT, in RISCVPostLegalizerCombinerImpl() 142 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction()
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| HD | RISCVLegalizerInfo.h | 23 class RISCVSubtarget; variable 26 const RISCVSubtarget &STI; 31 RISCVLegalizerInfo(const RISCVSubtarget &ST);
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| HD | RISCVRegisterBankInfo.cpp | 362 assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD()); in getInstrMapping() 385 assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD()); in getInstrMapping() 490 assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD()); in getInstrMapping() 501 assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD()); in getInstrMapping()
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