Searched refs:Op1Hi (Results 1 – 3 of 3) sorted by relevance
| /freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeVectorTypes.cpp | 1410 SDValue Op1Lo, Op1Hi; in SplitVecRes_TernaryOp() local 1411 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_TernaryOp() 1420 Hi = DAG.getNode(Opcode, dl, Op0Hi.getValueType(), Op0Hi, Op1Hi, Op2Hi, Flags); in SplitVecRes_TernaryOp() 1437 {Op0Hi, Op1Hi, Op2Hi, MaskHi, EVLHi}, Flags); in SplitVecRes_TernaryOp() 3082 SDValue Op0Lo, Op0Hi, Op1Lo, Op1Hi; in SplitVecRes_VECTOR_DEINTERLEAVE() local 3084 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_DEINTERLEAVE() 3090 DAG.getVTList(VT, VT), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_DEINTERLEAVE() 3097 SDValue Op0Lo, Op0Hi, Op1Lo, Op1Hi; in SplitVecRes_VECTOR_INTERLEAVE() local 3099 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi); in SplitVecRes_VECTOR_INTERLEAVE() 3105 DAG.getVTList(VT, VT), Op0Hi, Op1Hi)}; in SplitVecRes_VECTOR_INTERLEAVE()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVISelLowering.cpp | 10466 auto [Op1Lo, Op1Hi] = DAG.SplitVectorOperand(Op.getNode(), 1); in lowerVECTOR_DEINTERLEAVE() 10472 DAG.getVTList(SplitVT, SplitVT), Op1Lo, Op1Hi); in lowerVECTOR_DEINTERLEAVE() 10544 auto [Op1Lo, Op1Hi] = DAG.SplitVectorOperand(Op.getNode(), 1); in lowerVECTOR_INTERLEAVE() 10550 DAG.getVTList(SplitVT, SplitVT), Op0Hi, Op1Hi); in lowerVECTOR_INTERLEAVE()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 14726 SDValue Op1Hi = DAG.getNode(UnpkHi, dl, WidenedVT, Op.getOperand(1)); in LowerDIV() local 14728 SDValue ResultHi = DAG.getNode(Op.getOpcode(), dl, WidenedVT, Op0Hi, Op1Hi); in LowerDIV()
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