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Searched refs:HDMI_NV_PDISP_SOR_PLL0 (Results 1 – 2 of 2) sorted by relevance

/freebsd-head/sys/arm/nvidia/drm2/
HDtegra_hdmi.c650 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, tmds->pll0); in tmds_init()
665 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_sor_start()
669 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_sor_start()
672 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_sor_start()
674 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_sor_start()
789 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_enable()
791 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_enable()
794 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_enable()
796 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_enable()
HDtegra_hdmi_reg.h152 #define HDMI_NV_PDISP_SOR_PLL0 0x057 macro