Searched refs:ET_MII_ADDR_PHY_MASK (Results 1 – 2 of 2) sorted by relevance
306 #define ET_MII_ADDR_PHY_MASK 0x00001F00 macro
419 val = (phy << ET_MII_ADDR_PHY_SHIFT) & ET_MII_ADDR_PHY_MASK; in et_miibus_readreg()463 val = (phy << ET_MII_ADDR_PHY_SHIFT) & ET_MII_ADDR_PHY_MASK; in et_miibus_writereg()