Searched refs:CombineOpc (Results 1 – 4 of 4) sorted by relevance
| /freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVInstrInfo.cpp | 2080 unsigned CombineOpc) { in canCombine() argument
2087 if (!MI || MI->getParent() != &MBB || MI->getOpcode() != CombineOpc) in canCombine()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64InstrInfo.cpp | 5924 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine() argument
5932 if (!MI || MI->getParent() != &MBB || (unsigned)MI->getOpcode() != CombineOpc) in canCombine()
5947 if (isCombineInstrSettingFlag(CombineOpc) && in canCombine()
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| /freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeVectorTypes.cpp | 3336 unsigned CombineOpc = ISD::getVecReduceBaseOpcode(N->getOpcode()); in SplitVecOp_VECREDUCE() local
3337 SDValue Partial = DAG.getNode(CombineOpc, dl, LoOpVT, Lo, Hi, N->getFlags()); in SplitVecOp_VECREDUCE()
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| /freebsd-head/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 23320 unsigned CombineOpc; in LowerVSETCC() local
23324 CombineOpc = X86ISD::FOR; in LowerVSETCC()
23329 CombineOpc = X86ISD::FAND; in LowerVSETCC()
23348 Cmp = DAG.getNode(CombineOpc, dl, VT, Cmp0, Cmp1); in LowerVSETCC()
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