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Searched refs:CHSCCDR_IPU1_DI0_PRE_CLK_SEL_SHIFT (Results 1 – 2 of 2) sorted by relevance

/freebsd-head/sys/arm/freescale/imx/
HDimx6_ccmreg.h60 #define CHSCCDR_IPU1_DI0_PRE_CLK_SEL_SHIFT 6 macro
HDimx6_ccm.c460 reg |= (CHSCCDR_IPU_PRE_CLK_PLL5 << CHSCCDR_IPU1_DI0_PRE_CLK_SEL_SHIFT); in imx_ccm_ipu_enable()