Searched refs:AnyReg (Results 1 – 20 of 20) sorted by relevance
1085 def AnyReg : Operand<XLenVT> {1093 def InsnR : DirectiveInsnR<(outs AnyReg:$rd), (ins uimm7_opcode:$opcode, uimm3:$funct3,1094 uimm7:$funct7, AnyReg:$rs1,1095 AnyReg:$rs2),1097 def InsnR4 : DirectiveInsnR4<(outs AnyReg:$rd), (ins uimm7_opcode:$opcode,1100 AnyReg:$rs1, AnyReg:$rs2,1101 AnyReg:$rs3),1103 def InsnI : DirectiveInsnI<(outs AnyReg:$rd), (ins uimm7_opcode:$opcode, uimm3:$funct3,1104 AnyReg:$rs1, simm12:$imm12),1106 def InsnI_Mem : DirectiveInsnI<(outs AnyReg:$rd), (ins uimm7_opcode:$opcode,[all …]
763 def InsnCR : DirectiveInsnCR<(outs AnyReg:$rd), (ins uimm2_opcode:$opcode,765 AnyReg:$rs2),767 def InsnCI : DirectiveInsnCI<(outs AnyReg:$rd), (ins uimm2_opcode:$opcode,777 AnyReg:$rs2,818 (InsnCR AnyReg:$rd, uimm2_opcode:$opcode, uimm4:$funct4,819 AnyReg:$rs2)>;821 (InsnCI AnyReg:$rd, uimm2_opcode:$opcode, uimm3:$funct3,827 (InsnCSS uimm2_opcode:$opcode, uimm3:$funct3, AnyReg:$rs2,
60 AnyReg = 13, enumerator
2153 def InsnRI : DirectiveInsnRI<(outs), (ins imm64zx32:$enc, AnyReg:$R1,2156 def InsnRIE : DirectiveInsnRIE<(outs), (ins imm64zx48:$enc, AnyReg:$R1,2157 AnyReg:$R3, brtarget16:$I2),2159 def InsnRIL : DirectiveInsnRIL<(outs), (ins imm64zx48:$enc, AnyReg:$R1,2162 def InsnRILU : DirectiveInsnRIL<(outs), (ins imm64zx48:$enc, AnyReg:$R1,2166 (ins imm64zx48:$enc, AnyReg:$R1,2171 (ins imm64zx16:$enc, AnyReg:$R1, AnyReg:$R2),2174 AnyReg:$R1, AnyReg:$R2),2177 (ins imm64zx32:$enc, AnyReg:$R1, AnyReg:$R2,2178 AnyReg:$R3, imm32zx4:$M4),[all …]
202 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) in getCalleeSavedRegs()226 if (CC == CallingConv::AnyReg) in getCallPreservedMask()
150 defm AnyReg : SystemZRegClass<"AnyReg",
153 // "All registers" as used by the AnyReg calling convention.
36 // PPC64 AnyReg return-value convention. No explicit register is specified for72 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_PPC64_AnyReg>>,105 // No explicit register is specified for the AnyReg calling convention. The123 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_PPC64_AnyReg>>,161 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_PPC64_AnyReg>>,177 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_PPC64_AnyReg>>,
187 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) { in getCalleeSavedRegs()281 if (CC == CallingConv::AnyReg) { in getCallPreservedMask()
97 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); } in isAnyReg()
444 // X86-64 AnyReg return-value convention. No explicit register is specified for489 // Handle AnyReg calls.490 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_X86_64_AnyReg>>,746 // No explicit register is specified for the AnyReg calling convention. The1108 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_X86_64_AnyReg>>,
308 case CallingConv::AnyReg: in getCalleeSavedRegs()432 case CallingConv::AnyReg: in getCallPreservedMask()
80 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) in getCalleeSavedRegs()288 if (CC == CallingConv::AnyReg) in getCallPreservedMask()
1016 assert(I.getCallingConv() != CallingConv::AnyReg && in LowerStatepoint()
1036 unsigned CC = CallingConv::AnyReg; in EmitMachineNode()
766 bool IsAnyRegCC = CC == CallingConv::AnyReg; in selectPatchpoint()
10564 bool IsAnyRegCC = CC == CallingConv::AnyReg; in visitPatchpoint()
304 case CallingConv::AnyReg: Out << "anyregcc"; break; in PrintCallingConv()
5773 if (Call.getCallingConv() == CallingConv::AnyReg) { in visitIntrinsicCall()
2248 case lltok::kw_anyregcc: CC = CallingConv::AnyReg; break; in parseOptionalCallingConv()