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Searched refs:uart_getreg (Results 1 – 11 of 11) sorted by relevance

/freebsd-9-stable/sys/mips/cavium/
Duart_dev_oct16550.c89 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
93 (void)uart_getreg(bas, REG_LSR); in oct16550_clrint()
95 (void)uart_getreg(bas, REG_DATA); in oct16550_clrint()
97 (void)uart_getreg(bas, REG_MSR); in oct16550_clrint()
99 (void) uart_getreg(bas, REG_USR); in oct16550_clrint()
101 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
116 lcr = uart_getreg(bas, REG_LCR); in oct16550_delay()
119 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in oct16550_delay()
172 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) in oct16550_drain()
190 while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { in oct16550_drain()
[all …]
/freebsd-9-stable/sys/dev/uart/
Duart_dev_sab82532.c58 bgr = uart_getreg(bas, SAB_TCR); in sab82532_delay()
59 ccr2 = uart_getreg(bas, SAB_CCR2); in sab82532_delay()
108 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) in sab82532_flush()
114 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) in sab82532_flush()
157 ccr2 = uart_getreg(bas, SAB_CCR2); in sab82532_param()
219 pvr = uart_getreg(bas, SAB_PVR); in sab82532_init()
259 uart_getreg(bas, SAB_ISR0); in sab82532_init()
260 uart_getreg(bas, SAB_ISR1); in sab82532_init()
275 pvr = uart_getreg(bas, SAB_PVR); in sab82532_term()
297 while ((uart_getreg(bas, SAB_STAR) & SAB_STAR_TEC) && --limit) in sab82532_putc()
[all …]
Duart_dev_ns8250.c57 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
61 lsr = uart_getreg(bas, REG_LSR); in ns8250_clrint()
63 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
65 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
67 (void)uart_getreg(bas, REG_MSR); in ns8250_clrint()
69 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
79 lcr = uart_getreg(bas, REG_LCR); in ns8250_delay()
82 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in ns8250_delay()
131 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) in ns8250_drain()
149 while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { in ns8250_drain()
[all …]
Duart_dev_z8530.c69 return (uart_getreg(bas, REG_CTRL)); in uart_getmreg()
231 while (!(uart_getreg(bas, REG_CTRL) & BES_TXE)) in z8530_putc()
241 return ((uart_getreg(bas, REG_CTRL) & BES_RXA) != 0 ? 1 : 0); in z8530_rxready()
251 while (!(uart_getreg(bas, REG_CTRL) & BES_RXA)) { in z8530_getc()
257 c = uart_getreg(bas, REG_DATA); in z8530_getc()
540 xc = uart_getreg(bas, REG_DATA); in z8530_bus_receive()
558 (void)uart_getreg(bas, REG_DATA); in z8530_bus_receive()
Duart.h48 #define uart_getreg(bas, reg) \ macro
/freebsd-9-stable/sys/arm/sa11x0/
Duart_dev_sa1110.c83 while (uart_getreg(bas, SACOM_SR1) & SR1_TBY); in sa1110_init()
100 while (!(uart_getreg(bas, SACOM_SR1) & SR1_TNF)); in sa1110_putc()
108 return ((uart_getreg(bas, SACOM_SR1) & SR1_RNE) != 0 ? 1 : 0); in sa1110_rxready()
116 while (!(uart_getreg(bas, SACOM_SR1) & SR1_RNE)) { in sa1110_getc()
119 sr0 = uart_getreg(bas, SACOM_SR0); in sa1110_getc()
125 c = uart_getreg(bas, SACOM_DR); in sa1110_getc()
178 int sr = uart_getreg(&sc->sc_bas, SACOM_SR0); in sa1110_bus_transmit()
180 while (!(uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_TIE)) in sa1110_bus_transmit()
182 uart_getreg(&sc->sc_bas, SACOM_CR3) | CR3_TIE); in sa1110_bus_transmit()
186 uart_setreg(&sc->sc_bas, SACOM_CR3, uart_getreg(&sc->sc_bas, SACOM_CR3) in sa1110_bus_transmit()
[all …]
/freebsd-9-stable/sys/mips/adm5120/
Duart_dev_adm5120.c97 while (uart_getreg(bas, UART_FR_REG) & UART_FR_TX_FIFO_FULL) in adm5120_uart_putc()
100 while (uart_getreg(bas, UART_FR_REG) & UART_FR_BUSY) in adm5120_uart_putc()
108 if (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) in adm5120_uart_rxready()
121 while (uart_getreg(bas, UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) { in adm5120_uart_getc()
127 c = uart_getreg(bas, UART_DR_REG); in adm5120_uart_getc()
192 cr = uart_getreg(&sc->sc_bas, UART_CR_REG); in adm5120_uart_disable_txintr()
205 cr = uart_getreg(&sc->sc_bas, UART_CR_REG); in adm5120_uart_enable_txintr()
232 uart_getreg(bas, UART_LCR_H_REG) | UART_LCR_H_FEN); in adm5120_uart_bus_attach()
266 bes = uart_getreg(&sc->sc_bas, UART_FR_REG); in adm5120_uart_bus_getsig()
291 divisor = uart_getreg(bas, UART_LCR_M_REG); in adm5120_uart_bus_ioctl()
[all …]
/freebsd-9-stable/sys/mips/rt305x/
Duart_dev_rt305x.c141 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in rt305x_uart_putc()
144 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in rt305x_uart_putc()
151 if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR) in rt305x_uart_rxready()
167 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) { in rt305x_uart_getc()
173 c = uart_getreg(bas, UART_RX_REG); in rt305x_uart_getc()
239 cr = uart_getreg(bas, UART_IER_REG); in rt305x_uart_disable_txintr()
254 cr = uart_getreg(bas, UART_IER_REG); in rt305x_uart_enable_txintr()
282 uart_getreg(bas, UART_FCR_REG) | in rt305x_uart_bus_attach()
304 uint32_t fcr = uart_getreg(bas, UART_FCR_REG); in rt305x_uart_bus_flush()
328 bes = uart_getreg(&sc->sc_bas, UART_MSR_REG); in rt305x_uart_bus_getsig()
[all …]
Duart_dev_rt305x.h36 #undef uart_getreg
38 #define uart_getreg(bas, reg) \ macro
/freebsd-9-stable/sys/boot/arm/ixp425/boot2/
Dixp425_board.c60 static u_int8_t uart_getreg(u_int8_t *, int);
140 uart_getreg(u_int8_t *bas, int off) in uart_getreg() function
159 while ((uart_getreg(ubase, REG_LSR) & LSR_RXRDY) == 0 && --limit) in getc()
162 if ((uart_getreg(ubase, REG_LSR) & LSR_RXRDY) == LSR_RXRDY) in getc()
163 c = uart_getreg(ubase, REG_DATA); in getc()
175 while ((uart_getreg(ubase, REG_LSR) & LSR_THRE) == 0 && --limit) in putchar()
180 while ((uart_getreg(ubase, REG_LSR) & LSR_TEMT) == 0 && --limit) in putchar()
/freebsd-9-stable/sys/arm/s3c2xx0/
Duart_dev_s3c2410.c194 return ((uart_getreg(bas, SSCOM_UTRSTAT) & UTRSTAT_RXREADY) == in s3c2410_rxready()
301 uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH)); in s3c2410_bus_receive()