| /freebsd-9-stable/sys/dev/isci/scil/ |
| D | scic_sds_phy_registers.h | 78 #define scu_transport_layer_read(phy, reg) \ argument
80 scic_sds_phy_get_controller(phy), \
81 (phy)->transport_layer_registers->reg \
88 #define scu_transport_layer_write(phy, reg, value) \ argument
90 scic_sds_phy_get_controller(phy), \
91 (phy)->transport_layer_registers->reg, \
102 #define SCU_TLCR_READ(phy) \ argument
103 scu_transport_layer_read(phy, control)
108 #define SCU_TLCR_WRITE(phy, value) \ argument
109 scu_transport_layer_write(phy, control, value)
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| D | scic_sds_phy.h | 345 #define scic_sds_phy_get_index(phy) \ argument
346 ((phy)->phy_index)
351 #define scic_sds_phy_get_controller(phy) \ argument
352 (scic_sds_port_get_controller((phy)->owning_port))
357 #define scic_sds_phy_get_base_state_machine(phy) \ argument
358 (&(phy)->parent.state_machine)
364 #define scic_sds_phy_get_starting_substate_machine(phy) \ argument
365 (&(phy)->starting_substate_machine)
370 #define scic_sds_phy_set_state_handlers(phy, handlers) \ argument
371 ((phy)->state_handlers = (handlers))
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| D | scic_sds_port_configuration_agent.c | 143 SCIC_SDS_PHY_T * phy in scic_sds_port_configuration_agent_find_port() argument
157 controller, phy in scic_sds_port_configuration_agent_find_port()
163 scic_sds_phy_get_sas_address(phy, &phy_sas_address); in scic_sds_port_configuration_agent_find_port()
164 scic_sds_phy_get_attached_sas_address(phy, &phy_attached_device_address); in scic_sds_port_configuration_agent_find_port()
480 SCIC_SDS_PHY_T * phy in scic_sds_mpc_agent_link_up() argument
487 controller, port_agent, port, phy in scic_sds_mpc_agent_link_up()
495 port_agent->phy_ready_mask |= (1 << scic_sds_phy_get_index(phy)); in scic_sds_mpc_agent_link_up()
497 scic_sds_port_link_up(port, phy); in scic_sds_mpc_agent_link_up()
499 if ((port->active_phy_mask & (1 << scic_sds_phy_get_index(phy))) != 0) in scic_sds_mpc_agent_link_up()
501 port_agent->phy_configured_mask |= (1 << scic_sds_phy_get_index(phy)); in scic_sds_mpc_agent_link_up()
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| D | scic_phy.h | 283 SCI_PHY_HANDLE_T phy,
305 SCI_PHY_HANDLE_T phy,
327 SCI_PHY_HANDLE_T phy,
344 SCI_PHY_HANDLE_T phy
363 SCI_PHY_HANDLE_T phy,
383 SCI_PHY_HANDLE_T phy,
405 SCI_PHY_HANDLE_T phy,
426 SCI_PHY_HANDLE_T phy,
441 SCI_PHY_HANDLE_T phy
454 SCI_PHY_HANDLE_T phy
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| D | scic_sds_port.h | 329 #define scic_sds_port_write_phy_assignment(port, phy) \ argument
332 (phy)->phy_index, \
339 #define scic_sds_port_read_phy_assignment(port, phy) \ argument
342 (phy)->phy_index \
345 #define scic_sds_port_active_phy(port, phy) \ argument
346 (((port)->active_phy_mask & (1 << (phy)->phy_index)) != 0)
400 struct SCIC_SDS_PHY *phy,
407 struct SCIC_SDS_PHY *phy,
417 struct SCIC_SDS_PHY *phy
429 struct SCIC_SDS_PHY *phy
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| D | scic_sds_port.c | 274 SCIC_SDS_PHY_T *phy; in scic_sds_port_get_a_connected_phy() local
280 phy = this_port->phy_table[index]; in scic_sds_port_get_a_connected_phy()
282 (phy != NULL) in scic_sds_port_get_a_connected_phy()
283 && scic_sds_port_active_phy(this_port, phy) in scic_sds_port_get_a_connected_phy()
286 return phy; in scic_sds_port_get_a_connected_phy()
310 SCIC_SDS_PHY_T *phy in scic_sds_port_set_phy() argument
317 (port->phy_table[phy->phy_index] == SCI_INVALID_HANDLE) in scic_sds_port_set_phy()
318 && (scic_sds_phy_get_port(phy) == SCI_INVALID_HANDLE) in scic_sds_port_set_phy()
319 && scic_sds_port_is_valid_phy_assignment(port, phy->phy_index) in scic_sds_port_set_phy()
325 port->phy_table[phy->phy_index] = phy; in scic_sds_port_set_phy()
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| /freebsd-9-stable/sys/dev/cxgb/common/ |
| D | cxgb_ael1002.c | 98 static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms);
100 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument
106 err = mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs()
109 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs()
116 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument
118 int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon()
121 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon()
128 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) in ael_i2c_rd() argument
133 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL, in ael_i2c_rd()
140 err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat); in ael_i2c_rd()
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| D | cxgb_aq100x.c | 67 #define AQ_WRITE_REGS(phy, regs) do { \ argument
70 (void) mdio_write(phy, regs[i].mmd, regs[i].reg, regs[i].val); \
73 #define AQ_READ_REGS(phy, regs) do { \ argument
76 (void) mdio_read(phy, regs[i].mmd, regs[i].reg, &v); \
84 aq100x_temperature(struct cphy *phy) in aq100x_temperature() argument
88 if (mdio_read(phy, MDIO_DEV_VEND1, AQ_THERMAL2, &v) || in aq100x_temperature()
92 if (mdio_read(phy, MDIO_DEV_VEND1, AQ_THERMAL1, &v)) in aq100x_temperature()
99 aq100x_set_defaults(struct cphy *phy) in aq100x_set_defaults() argument
101 return mdio_write(phy, MDIO_DEV_VEND1, AQ_THERMAL_THR, 0x6c00); in aq100x_set_defaults()
105 aq100x_reset(struct cphy *phy, int wait) in aq100x_reset() argument
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| D | cxgb_tn1010.c | 76 static int tn1010_reset(struct cphy *phy, int wait) in tn1010_reset() argument
78 int err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait); in tn1010_reset()
83 static int tn1010_power_down(struct cphy *phy, int enable) in tn1010_power_down() argument
85 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, in tn1010_power_down()
89 static int tn1010_autoneg_enable(struct cphy *phy) in tn1010_autoneg_enable() argument
93 err = tn1010_power_down(phy, 0); in tn1010_autoneg_enable()
95 err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0, in tn1010_autoneg_enable()
100 static int tn1010_autoneg_restart(struct cphy *phy) in tn1010_autoneg_restart() argument
104 err = tn1010_power_down(phy, 0); in tn1010_autoneg_restart()
106 err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0, in tn1010_autoneg_restart()
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| D | cxgb_vsc8211.c | 275 static int vsc8211_set_automdi(struct cphy *phy, int enable) in vsc8211_set_automdi() argument
279 if ((err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5)) != 0 || in vsc8211_set_automdi()
280 (err = mdio_write(phy, 0, 18, 0x12)) != 0 || in vsc8211_set_automdi()
281 (err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003)) != 0 || in vsc8211_set_automdi()
282 (err = mdio_write(phy, 0, 16, 0x87fa)) != 0 || in vsc8211_set_automdi()
283 (err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0)) != 0) in vsc8211_set_automdi()
288 static int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex) in vsc8211_set_speed_duplex() argument
292 err = t3_set_phy_speed_duplex(phy, speed, duplex); in vsc8211_set_speed_duplex()
294 err = vsc8211_set_automdi(phy, 1); in vsc8211_set_speed_duplex()
405 struct cphy *phy = &portinfo->phy; in t3_vsc8211_fifo_depth() local
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| /freebsd-9-stable/sys/dev/e1000/ |
| D | e1000_phy.c | 72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic() local
76 phy->ops.init_params = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
77 phy->ops.acquire = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
78 phy->ops.check_polarity = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
79 phy->ops.check_reset_block = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
80 phy->ops.commit = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
81 phy->ops.force_speed_duplex = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
82 phy->ops.get_cfg_done = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
83 phy->ops.get_cable_length = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
84 phy->ops.get_info = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
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| D | e1000_82541.c | 87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541() local
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
98 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82541()
99 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82541()
100 phy->ops.get_cable_length = e1000_get_cable_length_igp_82541; in e1000_init_phy_params_82541()
101 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82541()
102 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_82541()
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| D | e1000_ich8lan.c | 198 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
203 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
212 if (hw->phy.id) { in e1000_phy_is_accessible_pchlan()
213 if (hw->phy.id == phy_id) in e1000_phy_is_accessible_pchlan()
216 hw->phy.id = phy_id; in e1000_phy_is_accessible_pchlan()
217 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
225 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
229 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
237 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
239 hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
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| D | e1000_82575.c | 166 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575() local
172 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
173 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
175 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
176 phy->type = e1000_phy_none; in e1000_init_phy_params_82575()
180 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82575()
181 phy->ops.power_down = e1000_power_down_phy_copper_82575; in e1000_init_phy_params_82575()
183 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82575()
184 phy->reset_delay_us = 100; in e1000_init_phy_params_82575()
186 phy->ops.acquire = e1000_acquire_phy_82575; in e1000_init_phy_params_82575()
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| D | e1000_82571.c | 96 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82571() local
101 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82571()
102 phy->type = e1000_phy_none; in e1000_init_phy_params_82571()
106 phy->addr = 1; in e1000_init_phy_params_82571()
107 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82571()
108 phy->reset_delay_us = 100; in e1000_init_phy_params_82571()
110 phy->ops.check_reset_block = e1000_check_reset_block_generic; in e1000_init_phy_params_82571()
111 phy->ops.reset = e1000_phy_hw_reset_generic; in e1000_init_phy_params_82571()
112 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82571; in e1000_init_phy_params_82571()
113 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic; in e1000_init_phy_params_82571()
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| D | e1000_80003es2lan.c | 91 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_80003es2lan() local
96 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_80003es2lan()
97 phy->type = e1000_phy_none; in e1000_init_phy_params_80003es2lan()
100 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_80003es2lan()
101 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan; in e1000_init_phy_params_80003es2lan()
104 phy->addr = 1; in e1000_init_phy_params_80003es2lan()
105 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_80003es2lan()
106 phy->reset_delay_us = 100; in e1000_init_phy_params_80003es2lan()
107 phy->type = e1000_phy_gg82563; in e1000_init_phy_params_80003es2lan()
109 phy->ops.acquire = e1000_acquire_phy_80003es2lan; in e1000_init_phy_params_80003es2lan()
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| D | e1000_82540.c | 68 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82540() local
71 phy->addr = 1; in e1000_init_phy_params_82540()
72 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82540()
73 phy->reset_delay_us = 10000; in e1000_init_phy_params_82540()
74 phy->type = e1000_phy_m88; in e1000_init_phy_params_82540()
77 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82540()
78 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_82540()
79 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_82540()
80 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_82540()
81 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82540()
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| D | e1000_82543.c | 86 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82543() local
91 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82543()
92 phy->type = e1000_phy_none; in e1000_init_phy_params_82543()
95 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82543()
96 phy->ops.power_down = e1000_power_down_phy_copper; in e1000_init_phy_params_82543()
99 phy->addr = 1; in e1000_init_phy_params_82543()
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82543()
101 phy->reset_delay_us = 10000; in e1000_init_phy_params_82543()
102 phy->type = e1000_phy_m88; in e1000_init_phy_params_82543()
105 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82543()
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| /freebsd-9-stable/sys/net80211/ |
| D | ieee80211_phy.c | 72 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },/* 1 Mb */
73 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },/* 2 Mb */
74 [2] = { .phy = CCK, 5500, 0x04, B(11), 1 },/* 5.5 Mb */
75 [3] = { .phy = CCK, 11000, 0x04, B(22), 1 },/* 11 Mb */
76 [4] = { .phy = PBCC, 22000, 0x04, 44, 3 } /* 22 Mb */
85 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },
86 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },
87 [2] = { .phy = CCK, 5500, 0x04, B(11), 2 },
88 [3] = { .phy = CCK, 11000, 0x04, B(22), 3 },
89 [4] = { .phy = OFDM, 6000, 0x00, 12, 4 },
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| /freebsd-9-stable/sys/dev/bxe/ |
| D | bxe_elink.c | 757 typedef elink_status_t (*read_sfp_module_eeprom_func_p)(struct elink_phy *phy,
948 static elink_status_t elink_sfp_module_detection(struct elink_phy *phy,
2250 params->phy[phy_index].mdio_ctrl); in elink_set_mdio_emac_per_phy()
2543 if (!(params->phy[ELINK_INT_PHY].flags & ELINK_FLAGS_TX_ERROR_CHECK)) { in elink_xmac_enable()
2574 (params->phy[ELINK_INT_PHY].supported & in elink_xmac_enable()
3413 struct elink_phy *phy, in elink_cl22_write() argument
3420 mode = REG_RD(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); in elink_cl22_write()
3421 REG_WR(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, in elink_cl22_write()
3425 tmp = ((phy->addr << 21) | (reg << 16) | val | in elink_cl22_write()
3428 REG_WR(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); in elink_cl22_write()
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| /freebsd-9-stable/tools/tools/net80211/wlantxtime/ |
| D | wlantxtime.c | 54 uint8_t phy; /* CCK/OFDM/TURBO */ member
105 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },/* 1 Mb */
106 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },/* 2 Mb */
107 [2] = { .phy = CCK, 5500, 0x04, B(11), 1 },/* 5.5 Mb */
108 [3] = { .phy = CCK, 11000, 0x04, B(22), 1 },/* 11 Mb */
109 [4] = { .phy = PBCC, 22000, 0x04, 44, 3 } /* 22 Mb */
118 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },
119 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },
120 [2] = { .phy = CCK, 5500, 0x04, B(11), 2 },
121 [3] = { .phy = CCK, 11000, 0x04, B(22), 3 },
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| /freebsd-9-stable/sys/dev/ixgbe/ |
| D | ixgbe_phy.c | 61 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_generic() local
66 phy->ops.identify = &ixgbe_identify_phy_generic; in ixgbe_init_phy_ops_generic()
67 phy->ops.reset = &ixgbe_reset_phy_generic; in ixgbe_init_phy_ops_generic()
68 phy->ops.read_reg = &ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic()
69 phy->ops.write_reg = &ixgbe_write_phy_reg_generic; in ixgbe_init_phy_ops_generic()
70 phy->ops.read_reg_mdi = &ixgbe_read_phy_reg_mdi; in ixgbe_init_phy_ops_generic()
71 phy->ops.write_reg_mdi = &ixgbe_write_phy_reg_mdi; in ixgbe_init_phy_ops_generic()
72 phy->ops.setup_link = &ixgbe_setup_phy_link_generic; in ixgbe_init_phy_ops_generic()
73 phy->ops.setup_link_speed = &ixgbe_setup_phy_link_speed_generic; in ixgbe_init_phy_ops_generic()
74 phy->ops.check_link = NULL; in ixgbe_init_phy_ops_generic()
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| /freebsd-9-stable/sys/dev/bwi/ |
| D | bwiphy.c | 155 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_attach() local
179 phy->phy_init = bwi_phy_init_11a; in bwi_phy_attach()
180 phy->phy_mode = IEEE80211_MODE_11A; in bwi_phy_attach()
181 phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11A; in bwi_phy_attach()
182 phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11A; in bwi_phy_attach()
183 phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11A; in bwi_phy_attach()
189 phy->phy_init = bwi_sup_bphy[i].init; in bwi_phy_attach()
199 phy->phy_mode = IEEE80211_MODE_11B; in bwi_phy_attach()
207 phy->phy_init = bwi_phy_init_11g; in bwi_phy_attach()
208 phy->phy_mode = IEEE80211_MODE_11G; in bwi_phy_attach()
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| /freebsd-9-stable/etc/rc.d/ |
| D | atm1 | 108 for phy in ${atmdev}; do
109 echo -n "Configuring ATM device ${phy}:"
112 eval netif_args=\$atm_netif_${phy}
114 atm set netif ${phy} ${netif_args} || continue
121 eval macaddr_args=\$atm_macaddr_${phy}
127 atm set mac ${phy} ${macaddr_args} || continue
133 eval sigmgr_args=\$atm_sigmgr_${phy}
135 atm attach ${phy} ${sigmgr_args} || continue
142 eval prefix_args=\$atm_prefix_${phy}
154 atm set prefix ${phy} ${prefix_args} || continue
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| /freebsd-9-stable/sys/dev/mii/ |
| D | ukphy_subr.c | 59 ukphy_status(struct mii_softc *phy) in ukphy_status() argument
61 struct mii_data *mii = phy->mii_pdata; in ukphy_status()
68 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR); in ukphy_status()
72 bmcr = PHY_READ(phy, MII_BMCR); in ukphy_status()
94 anlpar = PHY_READ(phy, MII_ANAR) & PHY_READ(phy, MII_ANLPAR); in ukphy_status()
95 if ((phy->mii_flags & MIIF_HAVE_GTCR) != 0 && in ukphy_status()
96 (phy->mii_extcapabilities & in ukphy_status()
98 gtcr = PHY_READ(phy, MII_100T2CR); in ukphy_status()
99 gtsr = PHY_READ(phy, MII_100T2SR); in ukphy_status()
126 mii->mii_media_active |= mii_phy_flowstatus(phy); in ukphy_status()
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