| /freebsd-9-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFormats.td | 557 class InherentRRE<string mnemonic, bits<16> opcode, RegisterOperand cls, 560 mnemonic#"\t$R1", 565 class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls> 567 mnemonic##"\t$R1, $I2", []> { 574 class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls> 576 mnemonic#"\t$R1, $R3, $BD2", []> { 580 class StoreRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator, 583 mnemonic#"\t$R1, $I2", 592 class StoreRX<string mnemonic, bits<8> opcode, SDPatternOperator operator, 596 mnemonic#"\t$R1, $XBD2", [all …]
|
| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 680 /// 1. Concatenates together the instruction mnemonic with the appropriate 687 string mnemonic, string args, list<dag> pattern, 692 !strconcat(mnemonic, "{", typeinfo.InstrSuffix, "}\t", args), pattern, 701 class BinOpRR<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 706 mnemonic, "{$src2, $src1|$src1, $src2}", pattern, itin>, 711 class BinOpRR_R<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 713 : BinOpRR<opcode, mnemonic, typeinfo, (outs typeinfo.RegClass:$dst), 720 class BinOpRR_F<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 722 : BinOpRR<opcode, mnemonic, typeinfo, (outs), 729 class BinOpRR_RF<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, [all …]
|
| D | X86InstrCompiler.td | 511 multiclass PSEUDO_ATOMIC_LOAD_BINOP<string mnemonic> { 516 !strconcat(mnemonic, "8 PSEUDO!"), []>; 520 !strconcat(mnemonic, "16 PSEUDO!"), []>; 524 !strconcat(mnemonic, "32 PSEUDO!"), []>; 528 !strconcat(mnemonic, "64 PSEUDO!"), []>; 562 multiclass PSEUDO_ATOMIC_LOAD_BINOP6432<string mnemonic> { 567 !strconcat(mnemonic, "6432 PSEUDO!"), []>; 607 Format ImmMod, string mnemonic> { 614 !strconcat(mnemonic, "{b}\t", 620 !strconcat(mnemonic, "{w}\t", [all …]
|
| D | X86InstrInfo.td | 1150 // and use the movabs mnemonic to indicate this specific form. 1462 multiclass ATOMIC_SWAP<bits<8> opc8, bits<8> opc, string mnemonic, string frag, 1467 !strconcat(mnemonic, "{b}\t{$val, $ptr|$ptr, $val}"), 1474 !strconcat(mnemonic, "{w}\t{$val, $ptr|$ptr, $val}"), 1481 !strconcat(mnemonic, "{l}\t{$val, $ptr|$ptr, $val}"), 1488 !strconcat(mnemonic, "{q}\t{$val, $ptr|$ptr, $val}"), 1819 multiclass bmi_bls<string mnemonic, Format RegMRM, Format MemMRM, 1823 !strconcat(mnemonic, "\t{$src, $dst|$dst, $src}"), 1826 !strconcat(mnemonic, "\t{$src, $dst|$dst, $src}"), 1846 multiclass bmi_bextr_bzhi<bits<8> opc, string mnemonic, RegisterClass RC, [all …]
|
| D | X86InstrFormats.td | 349 // AVX instructions have a 'v' prefix in the mnemonic 361 // AVX instructions have a 'v' prefix in the mnemonic 373 // AVX instructions have a 'v' prefix in the mnemonic 392 // AVX instructions have a 'v' prefix in the mnemonic
|
| /freebsd-9-stable/contrib/binutils/opcodes/ |
| D | s390-mkopc.c | 46 char mnemonic[16]; member 70 insertOpcode (char *opcode, char *mnemonic, char *format, in insertOpcode() argument 109 strcpy(op_array[ix].mnemonic, mnemonic); in insertOpcode() 144 printf (" { \"%s\", ", op_array[ix].mnemonic); in dumpTable() 176 char mnemonic[16]; in main() local 189 opcode, mnemonic, format, description, in main() 228 insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits); in main()
|
| D | cgen-asm.in | 77 return _("missing mnemonic in syntax string"); 85 /* Copy the literal mnemonic out of the insn. */ 203 /* For now we assume the mnemonic is first (there are no leading operands). 241 first char after the mnemonic part is a space. */
|
| D | cr16-dis.c | 801 if (strneq (instruction->mnemonic, "cinv", 4)) in print_insn_cr16() 802 info->fprintf_func (info->stream,"%s", getcinvstring ((char *)instruction->mnemonic)); in print_insn_cr16() 804 info->fprintf_func (info->stream, "%s", instruction->mnemonic); in print_insn_cr16()
|
| D | spu-dis.c | 122 (*info->fprintf_func) (info->stream, "%s", index->mnemonic); in print_insn_spu()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoV4.td | 217 class T_LD_abs_set<string mnemonic, RegisterClass RC>: 220 "$dst1 = "#mnemonic#"($dst2=##$addr)", 234 multiclass ld_idxd_shl_pbase<string mnemonic, RegisterClass RC, bit isNot, 240 ") ")#"$dst = "#mnemonic#"($src2+$src3<<#$offset)", 244 multiclass ld_idxd_shl_pred<string mnemonic, RegisterClass RC, bit PredNot> { 246 defm _c#NAME : ld_idxd_shl_pbase<mnemonic, RC, PredNot, 0>; 248 defm _cdn#NAME : ld_idxd_shl_pbase<mnemonic, RC, PredNot, 1>; 253 multiclass ld_idxd_shl<string mnemonic, string CextOp, RegisterClass RC> { 258 "$dst = "#mnemonic#"($src1+$src2<<#$offset)", 262 defm Pt_V4 : ld_idxd_shl_pred<mnemonic, RC, 0 >; [all …]
|
| D | HexagonInstrInfo.td | 95 multiclass ALU32_Pbase<string mnemonic, RegisterClass RC, bit isNot, 101 ") $dst = ")#mnemonic#"($src2, $src3)", 105 multiclass ALU32_Pred<string mnemonic, RegisterClass RC, bit PredNot> { 107 defm _c#NAME : ALU32_Pbase<mnemonic, RC, PredNot, 0>; 109 defm _cdn#NAME : ALU32_Pbase<mnemonic, RC, PredNot, 1>; 114 multiclass ALU32_base<string mnemonic, string CextOp, SDNode OpNode> { 119 "$dst = "#mnemonic#"($src1, $src2)", 124 defm Pt : ALU32_Pred<mnemonic, IntRegs, 0>; 125 defm NotPt : ALU32_Pred<mnemonic, IntRegs, 1>; 173 multiclass ALU32ri_Pbase<string mnemonic, bit isNot, bit isPredNew> { [all …]
|
| /freebsd-9-stable/contrib/bind9/bin/named/ |
| D | xfrout.c | 682 const char *mnemonic; /* Style of transfer */ member 743 const char *mnemonic = NULL; in ns_xfr_start() local 760 mnemonic = "AXFR"; in ns_xfr_start() 763 mnemonic = "IXFR"; in ns_xfr_start() 772 ISC_LOG_DEBUG(6), "%s request", mnemonic); in ns_xfr_start() 779 "%s request denied: %s", mnemonic, in ns_xfr_start() 864 "%s question section OK", mnemonic); in ns_xfr_start() 912 "%s authority section OK", mnemonic); in ns_xfr_start() 1007 mnemonic = "AXFR-style IXFR"; in ns_xfr_start() 1058 xfr->mnemonic = mnemonic; in ns_xfr_start() [all …]
|
| /freebsd-9-stable/contrib/binutils/gas/config/ |
| D | tc-cr16.c | 787 while (cr16_instruction[i].mnemonic != NULL) in md_begin() 790 const char *mnemonic = cr16_instruction[i].mnemonic; in md_begin() local 792 hashret = hash_insert (cr16_inst_hash, mnemonic, in md_begin() 796 as_fatal (_("Can't hash `%s': %s\n"), cr16_instruction[i].mnemonic, in md_begin() 807 while (cr16_instruction[i].mnemonic != NULL in md_begin() 808 && streq (cr16_instruction[i].mnemonic, mnemonic)); in md_begin() 1397 if (streq (cr16_no_op_insn[i], instruction->mnemonic)) in parse_insn() 2104 assemble_insn (char *mnemonic, ins *insn) in assemble_insn() argument 2157 && instruction->mnemonic != NULL in assemble_insn() 2159 && IS_INSN_MNEMONIC (mnemonic) in assemble_insn()
|
| D | tc-spu.c | 123 retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]); in md_begin() 127 spu_opcodes[i].mnemonic, retval); in md_begin() 240 len += sprintf (&buf[len], "%s\t", format->mnemonic); in insn_fmt_string() 290 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0) in md_assemble() 318 if (!strcmp (format[0].mnemonic, format[1].mnemonic)) in md_assemble()
|
| D | tc-i386.c | 1643 intel_float_operand (const char *mnemonic) in intel_float_operand() argument 1649 if (mnemonic[0] != 'f') in intel_float_operand() 1652 switch (mnemonic[1]) in intel_float_operand() 1660 if (mnemonic[2] == 'd' && (mnemonic[3] == 'c' || mnemonic[3] == 'e')) in intel_float_operand() 1664 if (mnemonic[2] != 'o' /* fnop */) in intel_float_operand() 1668 if (mnemonic[2] == 's') in intel_float_operand() 1672 if (mnemonic[2] == 'a') in intel_float_operand() 1674 if (mnemonic[2] == 't') in intel_float_operand() 1676 switch (mnemonic[3]) in intel_float_operand() 1687 if (mnemonic[2] == 'r' || mnemonic[2] == 's') in intel_float_operand() [all …]
|
| D | tc-ia64.c | 6241 char mnemonic[129]; local 6247 strcpy (mnemonic, idesc->name); 6414 error_pos + 1, mnemonic, 6688 char mnemonic[16]; in emit_one_bundle() local 6974 snprintf (mnemonic, sizeof (mnemonic), "%s.%c", in emit_one_bundle() 6979 idesc = ia64_find_opcode (mnemonic); in emit_one_bundle() 10809 char *saved_input_line_pointer, *mnemonic; local 10821 mnemonic = input_line_pointer; 10823 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); 10833 idesc = ia64_find_opcode (mnemonic); [all …]
|
| /freebsd-9-stable/sys/dev/cxgbe/tom/ |
| D | t4_cpl_io.c | 104 flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; in send_flowc_wr() 106 flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; in send_flowc_wr() 108 flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT; in send_flowc_wr() 110 flowc->mnemval[3].mnemonic = FW_FLOWC_MNEM_IQID; in send_flowc_wr() 115 flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDNXT; in send_flowc_wr() 117 flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_RCVNXT; in send_flowc_wr() 119 flowc->mnemval[6].mnemonic = FW_FLOWC_MNEM_SNDBUF; in send_flowc_wr() 121 flowc->mnemval[7].mnemonic = FW_FLOWC_MNEM_MSS; in send_flowc_wr() 124 flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDBUF; in send_flowc_wr() 126 flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_MSS; in send_flowc_wr()
|
| D | t4_listen.c | 391 flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; in send_reset_synqe() 393 flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; in send_reset_synqe() 395 flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT; in send_reset_synqe() 397 flowc->mnemval[3].mnemonic = FW_FLOWC_MNEM_IQID; in send_reset_synqe() 399 flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDBUF; in send_reset_synqe() 401 flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_MSS; in send_reset_synqe()
|
| /freebsd-9-stable/contrib/binutils/include/opcode/ |
| D | cr16.h | 255 const char *mnemonic; member 421 (strcmp (instruction->mnemonic, MNEMONIC) == 0)
|
| D | spu.h | 87 char *mnemonic; member
|
| D | cgen.h | 1000 const char *mnemonic; member 1001 #define CGEN_INSN_MNEMONIC(insn) ((insn)->base->mnemonic)
|
| /freebsd-9-stable/share/colldef/ |
| D | README | 6 For mnemonic names see ftp://std.dkuug.dk/i18n/charmaps/
|
| /freebsd-9-stable/contrib/binutils/gas/doc/ |
| D | c-i386.texi | 185 @cindex mnemonic suffixes, i386 188 @cindex mnemonic suffixes, x86-64 193 character of the instruction mnemonic. Mnemonic suffixes of @samp{b}, 239 assembler which assumes that a missing mnemonic suffix implies long 241 since compilers always explicitly specify the mnemonic suffix.) 247 is accomplished by using two instruction mnemonic suffixes in AT&T 250 and @samp{movzx} in Intel syntax). The instruction mnemonic suffixes 530 instruction mnemonic suffix (@samp{b}, @samp{w}, @samp{l} or @samp{q}, 591 Each supported type has an instruction mnemonic suffix and a constructor 592 associated with it. Instruction mnemonic suffixes specify the operand's [all …]
|
| /freebsd-9-stable/contrib/llvm/patches/ |
| D | patch-r262261-llvm-r198484-sparc.diff | 528 + // Check if we have valid mnemonic. 533 + // First operand in MCInst is instruction mnemonic.
|
| /freebsd-9-stable/contrib/llvm/include/llvm/Target/ |
| D | Target.td | 840 /// Does the instruction mnemonic allow '.' 895 /// MnemonicAlias - This class allows targets to define assembler mnemonic 896 /// aliases. This should be used when all forms of one mnemonic are accepted 897 /// with a different mnemonic. For example, X86 allows:
|