1 /*-
2 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed under OpenBSD by
15 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
16 * 4. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
20 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
32 * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
33 * $FreeBSD: stable/9/sys/powerpc/include/pio.h 193578 2009-06-06 09:33:32Z raj $
34 */
35
36 #ifndef _MACHINE_PIO_H_
37 #define _MACHINE_PIO_H_
38 /*
39 * I/O macros.
40 */
41
42 static __inline void
__outb(volatile u_int8_t * a,u_int8_t v)43 __outb(volatile u_int8_t *a, u_int8_t v)
44 {
45 *a = v;
46 __asm__ volatile("eieio; sync");
47 }
48
49 static __inline void
__outw(volatile u_int16_t * a,u_int16_t v)50 __outw(volatile u_int16_t *a, u_int16_t v)
51 {
52 *a = v;
53 __asm__ volatile("eieio; sync");
54 }
55
56 static __inline void
__outl(volatile u_int32_t * a,u_int32_t v)57 __outl(volatile u_int32_t *a, u_int32_t v)
58 {
59 *a = v;
60 __asm__ volatile("eieio; sync");
61 }
62
63 static __inline void
__outll(volatile u_int64_t * a,u_int64_t v)64 __outll(volatile u_int64_t *a, u_int64_t v)
65 {
66 *a = v;
67 __asm__ volatile("eieio; sync");
68 }
69
70 static __inline void
__outwrb(volatile u_int16_t * a,u_int16_t v)71 __outwrb(volatile u_int16_t *a, u_int16_t v)
72 {
73 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
74 __asm__ volatile("eieio; sync");
75 }
76
77 static __inline void
__outlrb(volatile u_int32_t * a,u_int32_t v)78 __outlrb(volatile u_int32_t *a, u_int32_t v)
79 {
80 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
81 __asm__ volatile("eieio; sync");
82 }
83
84 static __inline u_int8_t
__inb(volatile u_int8_t * a)85 __inb(volatile u_int8_t *a)
86 {
87 u_int8_t _v_;
88
89 _v_ = *a;
90 __asm__ volatile("eieio; sync");
91 return _v_;
92 }
93
94 static __inline u_int16_t
__inw(volatile u_int16_t * a)95 __inw(volatile u_int16_t *a)
96 {
97 u_int16_t _v_;
98
99 _v_ = *a;
100 __asm__ volatile("eieio; sync");
101 return _v_;
102 }
103
104 static __inline u_int32_t
__inl(volatile u_int32_t * a)105 __inl(volatile u_int32_t *a)
106 {
107 u_int32_t _v_;
108
109 _v_ = *a;
110 __asm__ volatile("eieio; sync");
111 return _v_;
112 }
113
114 static __inline u_int64_t
__inll(volatile u_int64_t * a)115 __inll(volatile u_int64_t *a)
116 {
117 u_int64_t _v_;
118
119 _v_ = *a;
120 __asm__ volatile("eieio; sync");
121 return _v_;
122 }
123
124 static __inline u_int16_t
__inwrb(volatile u_int16_t * a)125 __inwrb(volatile u_int16_t *a)
126 {
127 u_int16_t _v_;
128
129 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
130 __asm__ volatile("eieio; sync");
131 return _v_;
132 }
133
134 static __inline u_int32_t
__inlrb(volatile u_int32_t * a)135 __inlrb(volatile u_int32_t *a)
136 {
137 u_int32_t _v_;
138
139 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
140 __asm__ volatile("eieio; sync");
141 return _v_;
142 }
143
144 #define outb(a,v) (__outb((volatile u_int8_t *)(a), v))
145 #define out8(a,v) outb(a,v)
146 #define outw(a,v) (__outw((volatile u_int16_t *)(a), v))
147 #define out16(a,v) outw(a,v)
148 #define outl(a,v) (__outl((volatile u_int32_t *)(a), v))
149 #define out32(a,v) outl(a,v)
150 #define outll(a,v) (__outll((volatile u_int64_t *)(a), v))
151 #define out64(a,v) outll(a,v)
152 #define inb(a) (__inb((volatile u_int8_t *)(a)))
153 #define in8(a) inb(a)
154 #define inw(a) (__inw((volatile u_int16_t *)(a)))
155 #define in16(a) inw(a)
156 #define inl(a) (__inl((volatile u_int32_t *)(a)))
157 #define in32(a) inl(a)
158 #define inll(a) (__inll((volatile u_int64_t *)(a)))
159 #define in64(a) inll(a)
160
161 #define out8rb(a,v) outb(a,v)
162 #define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v))
163 #define out16rb(a,v) outwrb(a,v)
164 #define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v))
165 #define out32rb(a,v) outlrb(a,v)
166 #define in8rb(a) inb(a)
167 #define inwrb(a) (__inwrb((volatile u_int16_t *)(a)))
168 #define in16rb(a) inwrb(a)
169 #define inlrb(a) (__inlrb((volatile u_int32_t *)(a)))
170 #define in32rb(a) inlrb(a)
171
172
173 static __inline void
__outsb(volatile u_int8_t * a,const u_int8_t * s,size_t c)174 __outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
175 {
176 while (c--)
177 *a = *s++;
178 __asm__ volatile("eieio; sync");
179 }
180
181 static __inline void
__outsw(volatile u_int16_t * a,const u_int16_t * s,size_t c)182 __outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
183 {
184 while (c--)
185 *a = *s++;
186 __asm__ volatile("eieio; sync");
187 }
188
189 static __inline void
__outsl(volatile u_int32_t * a,const u_int32_t * s,size_t c)190 __outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
191 {
192 while (c--)
193 *a = *s++;
194 __asm__ volatile("eieio; sync");
195 }
196
197 static __inline void
__outsll(volatile u_int64_t * a,const u_int64_t * s,size_t c)198 __outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c)
199 {
200 while (c--)
201 *a = *s++;
202 __asm__ volatile("eieio; sync");
203 }
204
205 static __inline void
__outswrb(volatile u_int16_t * a,const u_int16_t * s,size_t c)206 __outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
207 {
208 while (c--)
209 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
210 __asm__ volatile("eieio; sync");
211 }
212
213 static __inline void
__outslrb(volatile u_int32_t * a,const u_int32_t * s,size_t c)214 __outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
215 {
216 while (c--)
217 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
218 __asm__ volatile("eieio; sync");
219 }
220
221 static __inline void
__insb(volatile u_int8_t * a,u_int8_t * d,size_t c)222 __insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
223 {
224 while (c--)
225 *d++ = *a;
226 __asm__ volatile("eieio; sync");
227 }
228
229 static __inline void
__insw(volatile u_int16_t * a,u_int16_t * d,size_t c)230 __insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
231 {
232 while (c--)
233 *d++ = *a;
234 __asm__ volatile("eieio; sync");
235 }
236
237 static __inline void
__insl(volatile u_int32_t * a,u_int32_t * d,size_t c)238 __insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
239 {
240 while (c--)
241 *d++ = *a;
242 __asm__ volatile("eieio; sync");
243 }
244
245 static __inline void
__insll(volatile u_int64_t * a,u_int64_t * d,size_t c)246 __insll(volatile u_int64_t *a, u_int64_t *d, size_t c)
247 {
248 while (c--)
249 *d++ = *a;
250 __asm__ volatile("eieio; sync");
251 }
252
253 static __inline void
__inswrb(volatile u_int16_t * a,u_int16_t * d,size_t c)254 __inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
255 {
256 while (c--)
257 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
258 __asm__ volatile("eieio; sync");
259 }
260
261 static __inline void
__inslrb(volatile u_int32_t * a,u_int32_t * d,size_t c)262 __inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
263 {
264 while (c--)
265 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
266 __asm__ volatile("eieio; sync");
267 }
268
269 #define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c))
270 #define outs8(a,s,c) outsb(a,s,c)
271 #define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c))
272 #define outs16(a,s,c) outsw(a,s,c)
273 #define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c))
274 #define outs32(a,s,c) outsl(a,s,c)
275 #define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c))
276 #define outs64(a,s,c) outsll(a,s,c)
277 #define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c))
278 #define ins8(a,d,c) insb(a,d,c)
279 #define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c))
280 #define ins16(a,d,c) insw(a,d,c)
281 #define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c))
282 #define ins32(a,d,c) insl(a,d,c)
283 #define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c))
284 #define ins64(a,d,c) insll(a,d,c)
285
286 #define outs8rb(a,s,c) outsb(a,s,c)
287 #define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c))
288 #define outs16rb(a,s,c) outswrb(a,s,c)
289 #define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c))
290 #define outs32rb(a,s,c) outslrb(a,s,c)
291 #define ins8rb(a,d,c) insb(a,d,c)
292 #define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c))
293 #define ins16rb(a,d,c) inswrb(a,d,c)
294 #define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c))
295 #define ins32rb(a,d,c) inslrb(a,d,c)
296
297 #endif /*_MACHINE_PIO_H_*/
298