Home
last modified time | relevance | path

Searched refs:gtt_offset (Results 1 – 12 of 12) sorted by relevance

/freebsd-9-stable/sys/dev/drm2/i915/
Di915_gem_tiling.c269 if (obj->gtt_offset & ~I915_FENCE_START_MASK) in i915_gem_object_fence_ok()
272 if (obj->gtt_offset & ~I830_FENCE_START_MASK) in i915_gem_object_fence_ok()
291 if (obj->gtt_offset & (size - 1)) in i915_gem_object_fence_ok()
365 (obj->gtt_offset + obj->base.size <= in i915_gem_set_tiling()
374 if (obj->gtt_offset & (unfenced_alignment - 1)) in i915_gem_set_tiling()
Dintel_fb.c95 info->fb_pbase = dev->agp->base + obj->gtt_offset; in intelfb_create()
131 info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset; in intelfb_create()
134 info->screen_base = ioremap_wc(dev->agp->base + obj->gtt_offset, size); in intelfb_create()
150 obj->gtt_offset, obj); in intelfb_create()
Dintel_ringbuffer.c49 u32 gtt_offset; member
180 u32 scratch_addr = pc->gtt_offset + 128; in intel_emit_post_sync_nonzero_flush()
218 u32 scratch_addr = pc->gtt_offset + 128; in gen6_render_ring_flush()
279 I915_WRITE_START(ring, obj->gtt_offset); in init_ring_common()
312 I915_READ_START(ring) == obj->gtt_offset && in init_ring_common()
363 pc->gtt_offset = obj->gtt_offset; in init_pipe_control()
596 u32 scratch_addr = pc->gtt_offset + 128; in pc_render_add_request()
614 intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); in pc_render_add_request()
632 intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); in pc_render_add_request()
1001 ring->status_page.gfx_addr = obj->gtt_offset; in init_status_page()
[all …]
Di915_gem.c529 if ((alignment && obj->gtt_offset & (alignment - 1)) || in i915_gem_object_pin()
534 obj->gtt_offset, alignment, in i915_gem_object_pin()
640 args->offset = obj->gtt_offset; in i915_gem_pin_ioctl()
984 if (obj->gtt_offset != 0 && rw == UIO_READ) in i915_gem_swap_io()
1063 mkva = (vm_offset_t)pmap_mapdev_attr(dev->agp->base + obj->gtt_offset + in i915_gem_gtt_write()
1427 m = vm_phys_fictitious_to_vm_page(dev->agp->base + obj->gtt_offset + in i915_gem_pager_fault()
2116 obj->gtt_offset = obj->gtt_space->start; in i915_gem_object_bind_to_gtt()
2123 obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end; in i915_gem_object_bind_to_gtt()
2126 CTR4(KTR_DRM, "object_bind %p %x %x %d", obj, obj->gtt_offset, in i915_gem_object_bind_to_gtt()
2203 obj->gtt_offset = 0; in i915_gem_object_unbind()
[all …]
Di915_gem_execbuffer.c281 target_offset = to_intel_bo(target_obj)->gtt_offset; in i915_gem_execbuffer_relocate_entry()
395 reloc->offset += obj->gtt_offset; in i915_gem_execbuffer_relocate_entry()
527 entry->offset = obj->gtt_offset; in pin_and_fence_object()
606 if ((entry->alignment && obj->gtt_offset & (entry->alignment - 1)) || in i915_gem_execbuffer_reserve()
1069 po_r = batch_obj->base.dev->agp->base + batch_obj->gtt_offset + in i915_gem_fix_mi_batchbuffer_end()
1352 exec_start = batch_obj->gtt_offset + args->batch_start_offset; in i915_gem_do_execbuffer()
Dintel_overlay.c203 overlay->reg_bo->gtt_offset, PAGE_SIZE, in intel_overlay_map_regs()
820 regs->OBUF_0Y = new_bo->gtt_offset + params->offset_Y; in intel_overlay_do_put_image()
834 regs->OBUF_0U = new_bo->gtt_offset + params->offset_U; in intel_overlay_do_put_image()
835 regs->OBUF_0V = new_bo->gtt_offset + params->offset_V; in intel_overlay_do_put_image()
1430 overlay->flip_addr = reg_bo->gtt_offset; in intel_setup_overlay()
1514 error->base = (long) overlay->reg_bo->gtt_offset; in intel_overlay_capture_error_state()
Di915_debug.c142 obj->gtt_offset, (unsigned int)obj->gtt_space->size); in describe_obj()
351 sbuf_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); in i915_gem_pageflip_info()
356 sbuf_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); in i915_gem_pageflip_info()
652 err->gtt_offset, in print_error_buffers()
759 obj->gtt_offset); in i915_error_state()
785 obj->gtt_offset); in i915_error_state()
Di915_irq.c919 stall_detected = I915_READ(dspsurf) == obj->gtt_offset; in i915_pageflip_stall_check()
922 stall_detected = I915_READ(dspaddr) == (obj->gtt_offset + in i915_pageflip_stall_check()
1915 reloc_offset = src->gtt_offset; in i915_error_object_create()
1954 dst->gtt_offset = src->gtt_offset; in i915_error_object_create()
2007 err->gtt_offset = obj->gtt_offset; in capture_bo_list()
Dintel_sprite.c140 I915_WRITE(SPRSURF(pipe), obj->gtt_offset); in ivb_update_plane()
297 I915_WRITE(DVSSURF(pipe), obj->gtt_offset); in snb_update_plane()
Di915_drv.h855 uint32_t gtt_offset; member
960 u32 gtt_offset; member
974 u32 gtt_offset; member
Dintel_display.c1701 I915_WRITE(ILK_FBC_RT_BASE, obj->gtt_offset | ILK_FBC_RT_VALID); in ironlake_enable_fbc()
2135 Start = obj->gtt_offset; in i9xx_update_plane()
2221 Start = obj->gtt_offset; in ironlake_update_plane()
6577 addr = obj->gtt_offset; in intel_crtc_cursor_set()
7412 OUT_RING(obj->gtt_offset + offset); in intel_gen2_queue_flip()
7450 OUT_RING(obj->gtt_offset + offset); in intel_gen3_queue_flip()
7483 OUT_RING(obj->gtt_offset | obj->tiling_mode); in intel_gen4_queue_flip()
7518 OUT_RING(obj->gtt_offset); in intel_gen6_queue_flip()
7560 intel_ring_emit(ring, (obj->gtt_offset)); in intel_gen7_queue_flip()
8925 OUT_RING(dev_priv->renderctx->gtt_offset | in ironlake_enable_rc6()
[all …]
/freebsd-9-stable/sys/dev/drm/
Di915_drv.h362 uint32_t gtt_offset; member