| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 124 N->getValueType(0)), in SoftenFloatRes_BUILD_PAIR() 132 N->getValueType(0))); in SoftenFloatRes_ConstantFP() 138 NewOp.getValueType().getVectorElementType(), in SoftenFloatRes_EXTRACT_VECTOR_ELT() 143 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FABS() 155 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FADD() 158 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), in SoftenFloatRes_FADD() 168 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FCEIL() 170 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), in SoftenFloatRes_FCEIL() 184 EVT LVT = LHS.getValueType(); in SoftenFloatRes_FCOPYSIGN() 185 EVT RVT = RHS.getValueType(); in SoftenFloatRes_FCOPYSIGN() [all …]
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| D | LegalizeIntegerTypes.cpp | 40 if (CustomLowerNode(N, N->getValueType(ResNo), true)) in PromoteIntegerResult() 157 Op.getValueType(), Op, N->getOperand(1)); in PromoteIntRes_AssertSext() 164 Op.getValueType(), Op, N->getOperand(1)); in PromoteIntRes_AssertZext() 168 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() 208 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST() 210 EVT OutVT = N->getValueType(0); in PromoteIntRes_BITCAST() 265 EVT OVT = N->getValueType(0); in PromoteIntRes_BSWAP() 266 EVT NVT = Op.getValueType(); in PromoteIntRes_BSWAP() 279 N->getValueType(0)), JoinIntegers(N->getOperand(0), in PromoteIntRes_BUILD_PAIR() 284 EVT VT = N->getValueType(0); in PromoteIntRes_Constant() [all …]
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| D | LegalizeVectorTypes.cpp | 134 LHS.getValueType(), LHS, RHS); in ScalarizeVecRes_BinOp() 142 Op0.getValueType(), Op0, Op1, Op2); in ScalarizeVecRes_TernaryOp() 152 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BITCAST() 158 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BUILD_VECTOR() 168 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_CONVERT_RNDSAT() 171 Op0, DAG.getValueType(NewVT), in ScalarizeVecRes_CONVERT_RNDSAT() 172 DAG.getValueType(Op0.getValueType()), in ScalarizeVecRes_CONVERT_RNDSAT() 180 N->getValueType(0).getVectorElementType(), in ScalarizeVecRes_EXTRACT_SUBVECTOR() 185 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_FP_ROUND() 194 Op.getValueType(), Op, N->getOperand(1)); in ScalarizeVecRes_FPOWI() [all …]
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| D | LegalizeTypesGeneric.cpp | 40 EVT OutVT = N->getValueType(0); in ExpandRes_BITCAST() 43 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() 132 LHS.getValueType().getSizeInBits() << 1), in ExpandRes_BITCAST() 167 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandRes_BITCAST() 169 StackPtr.getValueType())); in ExpandRes_BITCAST() 194 assert(Part.getValueType() == N->getValueType(0) && in ExpandRes_EXTRACT_ELEMENT() 203 unsigned OldElts = OldVec.getValueType().getVectorNumElements(); in ExpandRes_EXTRACT_VECTOR_ELT() 204 EVT OldEltVT = OldVec.getValueType().getVectorElementType(); in ExpandRes_EXTRACT_VECTOR_ELT() 209 EVT OldVT = N->getValueType(0); in ExpandRes_EXTRACT_VECTOR_ELT() 229 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); in ExpandRes_EXTRACT_VECTOR_ELT() [all …]
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| D | LegalizeTypes.cpp | 129 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(I)) { in PerformExpensiveChecks() 223 EVT ResultVT = N->getValueType(i); in run() 274 EVT OpVT = N->getOperand(i).getValueType(); in run() 409 if (!isTypeLegal(I->getValueType(i))) { in run() 417 !isTypeLegal(I->getOperand(i).getValueType())) { in run() 733 assert(Result.getValueType() == in SetPromotedInteger() 734 TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) && in SetPromotedInteger() 744 assert(Result.getValueType() == in SetSoftenedFloat() 745 TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) && in SetSoftenedFloat() 758 assert(Result.getValueType().getSizeInBits() >= in SetScalarizedVector() [all …]
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| D | LegalizeDAG.cpp | 262 EVT VT = CFP->getValueType(0); in ExpandConstantFP() 312 EVT VT = Val.getValueType(); in ExpandUnalignedStore() 365 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandUnalignedStore() 367 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); in ExpandUnalignedStore() 405 TLI.getShiftAmountTy(Val.getValueType())); in ExpandUnalignedStore() 415 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, in ExpandUnalignedStore() 437 EVT VT = LD->getValueType(0); in ExpandUnalignedLoad() 486 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); in ExpandUnalignedLoad() 487 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandUnalignedLoad() 544 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, in ExpandUnalignedLoad() [all …]
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| D | TargetLowering.cpp | 96 Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); in makeLibCall() 213 NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS); in softenSetCCOperands() 300 EVT VT = Op.getValueType(); in ShrinkDemandedConstant() 343 if (TLI.isTruncateFree(Op.getValueType(), SmallVT) && in ShrinkDemandedOp() 344 TLI.isZExtFree(SmallVT, Op.getValueType())) { in ShrinkDemandedOp() 353 dl, Op.getValueType(), X); in ShrinkDemandedOp() 374 assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth && in SimplifyDemandedBits() 396 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType())); in SimplifyDemandedBits() 444 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType())); in SimplifyDemandedBits() 515 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(), in SimplifyDemandedBits() [all …]
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| D | LegalizeVectorOps.cpp | 252 QueryType = Node->getValueType(0); in LegalizeOp() 259 QueryType = Node->getOperand(0).getValueType(); in LegalizeOp() 330 if (Op.getOperand(j).getValueType().isVector()) in PromoteVectorOp() 344 EVT VT = Op.getOperand(0).getValueType(); in PromoteVectorOpINT_TO_FP() 369 if (Op.getOperand(j).getValueType().isVector()) in PromoteVectorOpINT_TO_FP() 375 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), &Operands[0], in PromoteVectorOpINT_TO_FP() 393 EVT DstEltVT = Op.getNode()->getValueType(0).getScalarType(); in ExpandLoad() 439 BasePTR = DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR, in ExpandLoad() 440 DAG.getConstant(LoadBytes, BasePTR.getValueType())); in ExpandLoad() 501 Op.getNode()->getValueType(0).getScalarType(), in ExpandLoad() [all …]
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| D | DAGCombiner.cpp | 150 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); in SimplifyDemandedBits() 452 !TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) in isNegatibleForFree() 505 return DAG.getConstantFP(V, Op.getValueType()); in GetNegatedExpression() 515 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 520 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 534 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 545 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 551 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 558 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), in GetNegatedExpression() 562 return DAG.getNode(ISD::FP_ROUND, SDLoc(Op), Op.getValueType(), in GetNegatedExpression() [all …]
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| D | SelectionDAG.cpp | 122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); in isBuildVectorAllOnes() 472 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); in AddNodeIDCustom() 529 if (N->getValueType(0) == MVT::Glue) in doNotCSE() 541 if (N->getValueType(i) == MVT::Glue) in doNotCSE() 697 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && in RemoveNodeFromCSEMaps() 797 EVT VT = N->getValueType(0); in VerifyNodeCommon() 802 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && in VerifyNodeCommon() 804 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && in VerifyNodeCommon() 812 assert(N->getValueType(0).isVector() && "Wrong return type!"); in VerifyNodeCommon() 813 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && in VerifyNodeCommon() [all …]
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| D | SelectionDAGBuilder.cpp | 159 DAG.getConstant(Lo.getValueType().getSizeInBits(), in getCopyFromParts() 184 EVT PartEVT = Val.getValueType(); in getCopyFromParts() 196 DAG.getValueType(ValueVT)); in getCopyFromParts() 204 if (ValueVT.bitsLT(Val.getValueType())) in getCopyFromParts() 271 EVT PartEVT = Val.getValueType(); in getCopyFromPartsVector() 343 EVT ValueVT = Val.getValueType(); in getCopyToParts() 395 ValueVT = Val.getValueType(); in getCopyToParts() 474 EVT ValueVT = Val.getValueType(); in getCopyToPartsVector() 759 RegisterVT, P, DAG.getValueType(FromVT)); in getCopyFromRegs() 1067 EVT VT = TLI->getValueType(V->getType(), true); in getValueImpl() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 435 if (Subtarget->hasMips32() && N->getValueType(0) == MVT::i32 && in performADDECombine() 570 EVT Ty = N->getValueType(0); in performORCombine() 690 if (Subtarget->hasMips32() && N->getValueType(0) == MVT::i32 && in performSUBECombine() 738 EVT VT = N->getValueType(0); in performMULCombine() 775 EVT Ty = N->getValueType(0); in performSHLCombine() 798 EVT Ty = N->getValueType(0); in performSRACombine() 844 EVT Ty = N->getValueType(0); in performSRLCombine() 871 EVT Ty = N->getValueType(0); in performSETCCCombine() 884 EVT Ty = N->getValueType(0); in performVSELECTCombine() 941 EVT Ty = N->getValueType(0); in performXORCombine() [all …]
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| D | MipsSEISelDAGToDAG.cpp | 242 EVT VT = LHS.getValueType(); in selectAddESubE() 255 EVT ValTy = Addr.getValueType(); in selectAddrRegImm() 336 Offset = CurDAG->getTargetConstant(0, Addr.getValueType()); in selectAddrDefault() 349 EVT ValTy = Addr.getValueType(); in selectAddrRegImm12() 425 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatCommon() 500 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatUimmPow2() 531 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatMaskL() 564 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatMaskR() 585 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatUimmInvPow2() 632 if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) { in selectNode() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 141 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemset() 147 EVT CVT = Count.getValueType(); in EmitTargetCodeForMemset() 155 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag }; in EmitTargetCodeForMemset() 160 EVT AddrVT = Dst.getValueType(); in EmitTargetCodeForMemset() 161 EVT SizeVT = Size.getValueType(); in EmitTargetCodeForMemset() 243 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemcpy() 252 EVT DstVT = Dst.getValueType(); in EmitTargetCodeForMemcpy() 253 EVT SrcVT = Src.getValueType(); in EmitTargetCodeForMemcpy() 254 EVT SizeVT = Size.getValueType(); in EmitTargetCodeForMemcpy()
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| D | X86ISelLowering.cpp | 67 EVT VT = Vec.getValueType(); in ExtractSubVector() 105 assert((Vec.getValueType().is256BitVector() || in Extract128BitVector() 106 Vec.getValueType().is512BitVector()) && "Unexpected vector size!"); in Extract128BitVector() 113 assert(Vec.getValueType().is512BitVector() && "Unexpected vector size!"); in Extract256BitVector() 125 EVT VT = Vec.getValueType(); in InsertSubVector() 127 EVT ResultVT = Result.getValueType(); in InsertSubVector() 150 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in Insert128BitVector() 157 assert(Vec.getValueType().is256BitVector() && "Unexpected vector size!"); in Insert256BitVector() 1823 EVT ValVT = ValToCopy.getValueType(); in LowerReturn() 1928 if (Copy->getOperand(Copy->getNumOperands()-1).getValueType() == MVT::Glue) in isUsedByReturnOnly() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 757 assert(N->getValueType(0) == MVT::v16i8 && in isVMerge() 795 assert(N->getValueType(0) == MVT::v16i8 && in isVSLDOIShuffleMask() 831 assert(N->getValueType(0) == MVT::v16i8 && in isSplatShuffleMask() 960 assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!"); in get_VSPLTI_elt() 1006 if (N->getValueType(0) == MVT::i32) in isIntS16Immediate() 1118 Disp = DAG.getTargetConstant(imm, N.getValueType()); in SelectAddressRegImm() 1120 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); in SelectAddressRegImm() 1121 fixupFuncForFI(DAG, FI->getIndex(), N.getValueType()); in SelectAddressRegImm() 1152 Disp = DAG.getTargetConstant(imm, N.getValueType()); in SelectAddressRegImm() 1163 Disp = DAG.getTargetConstant(Imm, CN->getValueType(0)); in SelectAddressRegImm() [all …]
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| D | PPCISelDAGToDAG.cpp | 286 if (N->getValueType(0) == MVT::i32) in isIntS16Immediate() 300 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) { in isInt32Immediate() 310 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i64) { in isInt64Immediate() 361 if (N->getValueType(0) != MVT::i32) in isRotateAndMask() 476 if (LHS.getValueType() == MVT::i32) { in SelectCC() 517 } else if (LHS.getValueType() == MVT::i64) { in SelectCC() 560 } else if (LHS.getValueType() == MVT::f32) { in SelectCC() 563 assert(LHS.getValueType() == MVT::f64 && "Unknown vt!"); in SelectCC() 796 if (LHS.getValueType().isVector()) { in SelectSETCC() 797 EVT VecVT = LHS.getValueType(); in SelectSETCC() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 114 : Opcode(Op), BitSize(N.getValueType().getSizeInBits()), in RxSBGOperands() 133 return CurDAG->getTargetConstant(Imm, Node->getValueType(0)); in getImm() 586 } else if (Base.getValueType() != VT) { in getAddressOperands() 588 assert(VT == MVT::i32 && Base.getValueType() == MVT::i64 && in getAddressOperands() 619 getAddressOperands(AM, Addr.getValueType(), Base, Disp); in selectBDAddr() 630 getAddressOperands(AM, Addr.getValueType(), Base, Disp); in selectMVIAddr() 642 getAddressOperands(AM, Addr.getValueType(), Base, Disp, Index); in selectBDXAddr() 666 uint64_t Used = allOnes(Op.getValueType().getSizeInBits()); in detectOrAndInsertion() 755 if (RxSBG.BitSize != 64 || N.getValueType() != MVT::i64) in expandRxSBG() 772 unsigned InnerBitSize = N.getOperand(0).getValueType().getSizeInBits(); in expandRxSBG() [all …]
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| D | SystemZSelectionDAGInfo.cpp | 36 EVT PtrVT = Src.getValueType(); in emitMemMem() 91 EVT PtrVT = Dst.getValueType(); in EmitTargetCodeForMemset() 162 EVT PtrVT = Src1.getValueType(); in emitCLC() 212 EVT PtrVT = Src.getValueType(); in EmitTargetCodeForMemchr() 242 SDVTList VTs = DAG.getVTList(Dest.getValueType(), MVT::Other); in EmitTargetCodeForStrcpy() 253 SDVTList VTs = DAG.getVTList(Src1.getValueType(), MVT::Other, MVT::Glue); in EmitTargetCodeForStrcmp() 269 EVT PtrVT = Src.getValueType(); in getBoundedStrlen() 281 EVT PtrVT = Src.getValueType(); in EmitTargetCodeForStrlen() 289 EVT PtrVT = Src.getValueType(); in EmitTargetCodeForStrnlen()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 408 DAG.getValueType(VA.getLocVT())); in LowerFormalArguments_32() 578 DAG.getValueType(VA.getValVT())); in LowerFormalArguments_64() 582 DAG.getValueType(VA.getValVT())); in LowerFormalArguments_64() 811 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in LowerCall_32() 914 RegsToPass[i].second.getValueType())); in LowerCall_32() 1228 RegsToPass[i].second.getValueType())); in LowerCall_64() 1299 DAG.getValueType(VA.getValVT())); in LowerCall_64() 1303 DAG.getValueType(VA.getValVT())); in LowerCall_64() 1767 GA->getValueType(0), in withTargetFlags() 1772 CP->getValueType(0), in withTargetFlags() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 310 EVT VT = Op.getValueType(); in ExtractVectorElements() 325 A.getValueType().getVectorNumElements()); in LowerCONCAT_VECTORS() 327 B.getValueType().getVectorNumElements()); in LowerCONCAT_VECTORS() 329 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), in LowerCONCAT_VECTORS() 337 EVT VT = Op.getValueType(); in LowerEXTRACT_SUBVECTOR() 342 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), in LowerEXTRACT_SUBVECTOR() 359 Op.getValueType()); in LowerFrameIndex() 366 EVT VT = Op.getValueType(); in LowerINTRINSIC_WO_CHAIN() 406 EVT VT = Op.getValueType(); in LowerIntrinsicIABS() 418 EVT VT = Op.getValueType(); in LowerIntrinsicLRP() [all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 415 LD->getValueType(0), in SelectBaseOffsetLoad() 447 N1.getNode()->getValueType(0) == MVT::i32) { in SelectIndexedLoadSignExtend64() 514 N1.getNode()->getValueType(0) == MVT::i32) { in SelectIndexedLoadZeroExtend64() 619 if (LD->getValueType(0) == MVT::i64 && in SelectIndexedLoad() 623 if (LD->getValueType(0) == MVT::i64 && in SelectIndexedLoad() 631 LD->getValueType(0), in SelectIndexedLoad() 651 LD->getValueType(0), in SelectIndexedLoad() 774 !(Value.getValueType() == MVT::i64 && ST->isTruncatingStore())) { in SelectBaseOffsetStore() 841 if (N->getValueType(0) == MVT::i64) { in SelectMul() 852 if (Sext0.getNode()->getValueType(0) != MVT::i32) { in SelectMul() [all …]
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| /freebsd-9-stable/contrib/llvm/patches/ |
| D | patch-r267704-llvm-r211435-fix-avx-backend.diff | 54 + EVT VecVT = Vec.getValueType(); 68 + Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(), 72 + unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8; 74 + DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 75 + DAG.getConstant(IncrementSize, StackPtr.getValueType())); 78 + Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
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| D | patch-r262582-llvm-r202422-sparc.diff | 20 - if (Op.getValueType() == MVT::f64) 22 - if (Op.getValueType() == MVT::f128) 30 if (Op.getValueType() == MVT::f64) 33 if (Op.getValueType() != MVT::f128)
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1543 RegsToPass[i].second.getValueType())); in LowerCall() 1811 EVT VT = RHSC->getValueType(0); in getSelectableIntSetCC() 1943 DAG.getConstant(0, TheBit.getValueType()), in LowerBRCOND() 1961 if (LHS.getValueType() == MVT::f128) { in LowerBR_CC() 1969 RHS = DAG.getConstant(0, LHS.getValueType()); in LowerBR_CC() 1974 if (LHS.getValueType().isInteger()) { in LowerBR_CC() 2012 EVT ArgVT = Op.getOperand(i).getValueType(); in LowerF128ToCall() 2021 Type *RetTy = Op.getValueType().getTypeForEVT(*DAG.getContext()); in LowerF128ToCall() 2052 if (Op.getOperand(0).getValueType() != MVT::f128) { in LowerFP_ROUND() 2058 LC = RTLIB::getFPROUND(Op.getOperand(0).getValueType(), Op.getValueType()); in LowerFP_ROUND() [all …]
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