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Searched refs:csr (Results 1 – 25 of 51) sorted by relevance

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/freebsd-9-stable/sys/sparc64/sbus/
Dlsi64854.c128 uint32_t csr; in lsi64854_attach() local
188 csr = L64854_GCSR(sc); in lsi64854_attach()
189 sc->sc_rev = csr & L64854_DEVID; in lsi64854_attach()
213 DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr)); in lsi64854_attach()
252 uint32_t csr; \
265 csr = L64854_GCSR(sc); \
267 csr |= D_ESC_DRAIN; \
269 csr |= L64854_INVALIDATE; \
271 L64854_SCSR(sc, csr); \
282 uint32_t csr; \
[all …]
Dlsi64854var.h68 #define L64854_SCSR(sc, csr) bus_write_4((sc)->sc_res, L64854_REG_CSR, csr) argument
79 uint32_t csr = L64854_GCSR(sc); \
80 csr |= L64854_INT_EN; \
81 L64854_SCSR(sc, csr); \
87 uint32_t csr = L64854_GCSR(sc); \
88 csr |= D_EN_DMA; \
89 L64854_SCSR(sc, csr); \
Ddma_sbus.c179 uint32_t csr; in dma_attach() local
209 csr = L64854_GCSR(lsc); in dma_attach()
213 csr |= E_TP_AUI; in dma_attach()
216 csr &= ~E_TP_AUI; in dma_attach()
218 csr |= E_TP_AUI; in dma_attach()
221 L64854_SCSR(lsc, csr); in dma_attach()
/freebsd-9-stable/sys/dev/usb/controller/
Dmusb_otg.c369 uint8_t csr; in musbotg_dev_ctrl_setup_rx() local
387 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
389 DPRINTFN(4, "csr=0x%02x\n", csr); in musbotg_dev_ctrl_setup_rx()
395 if (csr & MUSB2_MASK_CSR0L_DATAEND) { in musbotg_dev_ctrl_setup_rx()
403 if (csr & MUSB2_MASK_CSR0L_SENTSTALL) { in musbotg_dev_ctrl_setup_rx()
407 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
411 if (csr & MUSB2_MASK_CSR0L_SETUPEND) { in musbotg_dev_ctrl_setup_rx()
416 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
424 if (!(csr & MUSB2_MASK_CSR0L_RXPKTRDY)) { in musbotg_dev_ctrl_setup_rx()
495 uint8_t csr, csrh; in musbotg_host_ctrl_setup_tx() local
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Dat91dci.c122 #define AT91_CSR_ACK(csr, what) do { \ argument
123 (csr) &= ~((AT91_UDP_CSR_FORCESTALL| \
126 (csr) |= ((AT91_UDP_CSR_RX_DATA_BK0| \
300 uint32_t csr; in at91dci_setup_rx() local
305 csr = bus_space_read_4(td->io_tag, td->io_hdl, in at91dci_setup_rx()
308 DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder); in at91dci_setup_rx()
310 temp = csr; in at91dci_setup_rx()
317 if (!(csr & AT91_UDP_CSR_RXSETUP)) { in at91dci_setup_rx()
324 count = (csr & AT91_UDP_CSR_RXBYTECNT) >> 16; in at91dci_setup_rx()
360 csr |= AT91_UDP_CSR_DIR; in at91dci_setup_rx()
[all …]
/freebsd-9-stable/sys/sparc64/pci/
Dpsychoreg.h218 #define PSYCHO_GCSR_IMPL(csr) ((u_int)(((csr) >> 60) & 0xf)) argument
219 #define PSYCHO_GCSR_VERS(csr) ((u_int)(((csr) >> 56) & 0xf)) argument
220 #define PSYCHO_GCSR_MID(csr) ((u_int)(((csr) >> 51) & 0x1f)) argument
221 #define PSYCHO_GCSR_IGN(csr) ((u_int)(((csr) >> 46) & 0x1f)) argument
Dpsycho.c294 uint64_t csr, dr; in psycho_attach() local
371 csr = PSYCHO_READ8(sc, PSR_CS); in psycho_attach()
372 ver = PSYCHO_GCSR_VERS(csr); in psycho_attach()
375 sc->sc_ign = PSYCHO_GCSR_IGN(csr); in psycho_attach()
381 desc->pd_name, (u_int)PSYCHO_GCSR_IMPL(csr), ver, sc->sc_ign, in psycho_attach()
386 csr = PCICTL_READ8(sc, PCR_CS); in psycho_attach()
387 csr &= ~PCICTL_ARB_PARK; in psycho_attach()
389 csr |= PCICTL_ARB_PARK; in psycho_attach()
400 csr &= ~PCICTL_ARB_PARK; in psycho_attach()
411 csr |= PCICTL_ERRINTEN | PCICTL_ARB_4; in psycho_attach()
[all …]
/freebsd-9-stable/sys/dev/mk48txx/
Dmk48txx.c163 uint8_t csr; in mk48txx_gettime() local
170 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_gettime()
171 csr |= MK48TXX_CSR_READ; in mk48txx_gettime()
172 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); in mk48txx_gettime()
205 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_gettime()
206 csr &= ~MK48TXX_CSR_READ; in mk48txx_gettime()
207 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); in mk48txx_gettime()
223 uint8_t csr; in mk48txx_settime() local
237 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_settime()
238 csr |= MK48TXX_CSR_WRITE; in mk48txx_settime()
[all …]
/freebsd-9-stable/sys/powerpc/booke/
Dmp_cpudep.c53 uint32_t msr, sp, csr; in cpudep_ap_bootstrap() local
56 csr = mfspr(SPR_L1CSR0); in cpudep_ap_bootstrap()
57 if ((csr & L1CSR0_DCE) == 0) { in cpudep_ap_bootstrap()
62 csr = mfspr(SPR_L1CSR1); in cpudep_ap_bootstrap()
63 if ((csr & L1CSR1_ICE) == 0) { in cpudep_ap_bootstrap()
Dmachdep.c289 uint32_t csr; in booke_init() local
400 csr = ccsr_read4(OCP85XX_L2CTL); in booke_init()
401 debugf(" L2CTL = 0x%08x\n", csr); in booke_init()
445 csr = mfspr(SPR_L1CSR0); in booke_init()
446 if ((csr & L1CSR0_DCE) == 0) { in booke_init()
451 csr = mfspr(SPR_L1CSR0); in booke_init()
452 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) in booke_init()
454 (csr & L1CSR0_DCE) ? "en" : "dis"); in booke_init()
457 csr = mfspr(SPR_L1CSR1); in booke_init()
458 if ((csr & L1CSR1_ICE) == 0) { in booke_init()
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/freebsd-9-stable/sys/dev/sound/sbus/
Dcs4231.c737 u_int32_t csr; in cs4231_sbus_intr() local
743 csr = APC_READ(sc, APC_CSR); in cs4231_sbus_intr()
744 if ((csr & APC_CSR_GI) == 0) { in cs4231_sbus_intr()
748 APC_WRITE(sc, APC_CSR, csr); in cs4231_sbus_intr()
750 if ((csr & APC_CSR_EIE) && (csr & APC_CSR_EI)) { in cs4231_sbus_intr()
757 if ((csr & APC_CSR_PMIE) && (csr & APC_CSR_PMI)) { in cs4231_sbus_intr()
772 if ((csr & APC_CSR_CIE) && (csr & APC_CSR_CI) && (csr & APC_CSR_CD)) { in cs4231_sbus_intr()
799 u_int32_t csr; in cs4231_ebus_pintr() local
805 csr = EBDMA_P_READ(sc, EBDMA_DCSR); in cs4231_ebus_pintr()
806 if ((csr & EBDCSR_INT) == 0) { in cs4231_ebus_pintr()
[all …]
/freebsd-9-stable/sys/arm/at91/
Duart_dev_at91usart.c535 uint32_t csr; in at91_usart_bus_ipend() local
547 csr = RD4(&sc->sc_bas, USART_CSR); in at91_usart_bus_ipend()
548 if (csr & USART_CSR_ENDTX) { in at91_usart_bus_ipend()
553 if (csr & (USART_CSR_TXRDY | USART_CSR_ENDTX)) { in at91_usart_bus_ipend()
556 WR4(&sc->sc_bas, USART_IDR, csr & (USART_CSR_TXRDY | in at91_usart_bus_ipend()
567 if (csr & USART_CSR_RXBUFF) { in at91_usart_bus_ipend()
593 } else if (csr & USART_CSR_ENDRX) { in at91_usart_bus_ipend()
612 } else if (csr & USART_CSR_TIMEOUT) { in at91_usart_bus_ipend()
635 } else if (csr & USART_CSR_RXRDY) { in at91_usart_bus_ipend()
644 if (csr & USART_CSR_RXBRK) { in at91_usart_bus_ipend()
[all …]
Dat91_spi.c107 uint32_t csr; in at91_spi_attach() local
148 csr = SPI_CSR_CPOL | (4 << 16) | (0xff << 8); in at91_spi_attach()
149 WR4(sc, SPI_CSR0, csr); in at91_spi_attach()
150 WR4(sc, SPI_CSR1, csr); in at91_spi_attach()
151 WR4(sc, SPI_CSR2, csr); in at91_spi_attach()
152 WR4(sc, SPI_CSR3, csr); in at91_spi_attach()
/freebsd-9-stable/sys/dev/pdq/
Dpdq_freebsd.h146 #define PDQ_CSR_WRITE(csr, name, data) PDQ_OS_IOWR_32((csr)->csr_bus, (csr)->csr_base, (csr)->name… argument
147 #define PDQ_CSR_READ(csr, name) PDQ_OS_IORD_32((csr)->csr_bus, (csr)->csr_base, (csr)->name) argument
Dpdqvar.h149 #define PDQ_CSR_WRITE(csr, name, data) PDQ_OS_MEMWR_32((csr)->csr_bus, (csr)->name, 0, data) argument
150 #define PDQ_CSR_READ(csr, name) PDQ_OS_MEMRD_32((csr)->csr_bus, (csr)->name, 0) argument
/freebsd-9-stable/sys/dev/lmc/
Dif_lmc.h1217 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) argument
1218 # define WRITE_CSR(csr, val) bus_space_write_4(sc->csr_tag, sc->csr_handle, csr, val) argument
1273 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) argument
1274 # define WRITE_CSR(csr, val) bus_space_write_4(sc->csr_tag, sc->csr_handle, csr, val) argument
1302 # define READ_CSR(csr) bus_space_read_4 (sc->csr_tag, sc->csr_handle, csr) argument
1303 # define WRITE_CSR(csr, val) bus_space_write_4(sc->csr_tag, sc->csr_handle, csr, val) argument
1332 # define READ_CSR(csr) inl(sc->csr_iobase+(csr)) argument
1333 # define WRITE_CSR(csr, val) outl(sc->csr_iobase+(csr), (val)) argument
1336 # define READ_CSR(csr) (0 + *(sc->csr_membase+(csr))) argument
1337 # define WRITE_CSR(csr, val) ((void)(*(sc->csr_membase+(csr)) = (val))) argument
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Dif_lmc.c328 u_int32_t csr = READ_CSR(TLP_SROM_MII); in shift_srom_bits() local
332 csr |= TLP_SROM_DIN; /* DIN setup */ in shift_srom_bits()
334 csr &= ~TLP_SROM_DIN; /* DIN setup */ in shift_srom_bits()
335 WRITE_CSR(TLP_SROM_MII, csr); in shift_srom_bits()
336 csr |= TLP_SROM_CLK; /* CLK rising edge */ in shift_srom_bits()
337 WRITE_CSR(TLP_SROM_MII, csr); in shift_srom_bits()
338 csr &= ~TLP_SROM_CLK; /* CLK falling edge */ in shift_srom_bits()
339 WRITE_CSR(TLP_SROM_MII, csr); in shift_srom_bits()
348 u_int32_t csr; in read_srom() local
352 csr = (TLP_SROM_SEL | TLP_SROM_RD | TLP_MII_MDOE); in read_srom()
[all …]
/freebsd-9-stable/sys/dev/mii/
Dlxtphy.c204 int bmcr, bmsr, csr; in lxtphy_status() local
214 csr = PHY_READ(sc, MII_LXTPHY_CSR); in lxtphy_status()
215 if (csr & CSR_LINK) in lxtphy_status()
235 if (csr & CSR_SPEED) in lxtphy_status()
239 if (csr & CSR_DUPLEX) in lxtphy_status()
/freebsd-9-stable/sys/dev/de/
Dif_de.c1700 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); in tulip_21140_smc9332_media_probe() local
1701 …if ((csr & (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) == (TULIP_GP_SMC_9332_OK10|TULIP_GP_S… in tulip_21140_smc9332_media_probe()
1704 } else if ((csr & TULIP_GP_SMC_9332_OK10) == 0) { in tulip_21140_smc9332_media_probe()
1802 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); in tulip_21140_znyx_zx34x_media_probe() local
1803 …if ((csr & (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) == (TULIP_GP_ZX34… in tulip_21140_znyx_zx34x_media_probe()
1806 } else if ((csr & TULIP_GP_ZX34X_LNKFAIL) == 0) { in tulip_21140_znyx_zx34x_media_probe()
1863 #define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
1868 unsigned bit, csr; in tulip_srom_idle() local
1870 csr = SROMSEL ; EMIT; in tulip_srom_idle()
1871 csr = SROMSEL | SROMRD; EMIT; in tulip_srom_idle()
[all …]
/freebsd-9-stable/sys/contrib/octeon-sdk/
Dcvmx-csr-db-support.c155 int csr = cvmx_csr_db_addresses[chip][index].csroff; in __cvmx_csr_db_decode_csr() local
157 …for (field=cvmx_csr_db[chip][csr].fieldoff+cvmx_csr_db[chip][csr].numfields-1; field>=cvmx_csr_db[… in __cvmx_csr_db_decode_csr()
/freebsd-9-stable/sys/dev/ppc/
Dppc.c695 int csr = SMC66x_CSR; /* initial value is 0x3F0 */ in ppc_smc37c66xgt_detect() local
700 #define cio csr+1 /* config IO port is either 0x3F1 or 0x371 */ in ppc_smc37c66xgt_detect()
707 outb(csr, SMC665_iCODE); in ppc_smc37c66xgt_detect()
708 outb(csr, SMC665_iCODE); in ppc_smc37c66xgt_detect()
711 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
719 outb(csr, SMC666_iCODE); in ppc_smc37c66xgt_detect()
720 outb(csr, SMC666_iCODE); in ppc_smc37c66xgt_detect()
723 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
730 csr = SMC666_CSR; in ppc_smc37c66xgt_detect()
741 outb(csr, 0x1); in ppc_smc37c66xgt_detect()
[all …]
/freebsd-9-stable/sys/dev/le/
Dif_le_ledma.c219 uint32_t aui_bit, csr; in le_dma_hwreset() local
224 csr = L64854_GCSR(dma); in le_dma_hwreset()
225 aui_bit = csr & E_TP_AUI; in le_dma_hwreset()
238 csr = L64854_GCSR(dma); in le_dma_hwreset()
239 csr |= (E_DSBL_WR_INVAL | aui_bit); in le_dma_hwreset()
240 L64854_SCSR(dma, csr); in le_dma_hwreset()
/freebsd-9-stable/sys/arm/xscale/i80321/
Di80321_aau.c167 int csr; in aau_bzero() local
262 while ((csr = AAU_REG_READ(sc, 0x4)) & (1 << 10)); in aau_bzero()
264 if (csr & (1 << 5)) /* error */ in aau_bzero()
269 AAU_REG_WRITE(sc, 0x4, csr); in aau_bzero()
Di80321_dma.c185 int csr; in dma_memcpy() local
324 while ((csr = DMA_REG_READ(sc, 0x4)) & (1 << 10)); in dma_memcpy()
326 if (csr & 0x2e) /* error */ in dma_memcpy()
/freebsd-9-stable/sys/dev/oce/
Doce_hw.c57 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
62 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); in oce_POST()
72 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
458 ctrl.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_CONTROL); in oce_pci_soft_reset()
460 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_CONTROL, ctrl.dw0); in oce_pci_soft_reset()

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