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Searched refs:XCore (Results 1 – 22 of 22) sorted by relevance

/freebsd-9-stable/contrib/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp29 namespace XCore { namespace
47 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP), in XCoreInstrInfo()
63 if (Opcode == XCore::LDWFI) in isLoadFromStackSlot()
85 if (Opcode == XCore::STWFI) in isStoreToStackSlot()
103 return BrOpc == XCore::BRFU_u6 in IsBRU()
104 || BrOpc == XCore::BRFU_lu6 in IsBRU()
105 || BrOpc == XCore::BRBU_u6 in IsBRU()
106 || BrOpc == XCore::BRBU_lu6; in IsBRU()
110 return BrOpc == XCore::BRFT_ru6 in IsBRT()
111 || BrOpc == XCore::BRFT_lru6 in IsBRT()
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DXCoreRegisterInfo.cpp41 : XCoreGenRegisterInfo(XCore::LR) { in XCoreRegisterInfo()
65 XCore::R4, XCore::R5, XCore::R6, XCore::R7, in getCalleeSavedRegs()
66 XCore::R8, XCore::R9, XCore::R10, XCore::LR, in getCalleeSavedRegs()
76 Reserved.set(XCore::CP); in getReservedRegs()
77 Reserved.set(XCore::DP); in getReservedRegs()
78 Reserved.set(XCore::SP); in getReservedRegs()
79 Reserved.set(XCore::LR); in getReservedRegs()
81 Reserved.set(XCore::R10); in getReservedRegs()
154 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); in eliminateFrameIndex()
156 assert(XCore::GRRegsRegClass.contains(Reg) && "Unexpected register operand"); in eliminateFrameIndex()
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DXCoreFrameLowering.cpp50 int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in loadFromStack()
65 int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in storeToStack()
105 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII); in emitPrologue()
126 Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue()
127 MBB.addLiveIn(XCore::LR); in emitPrologue()
131 Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in emitPrologue()
138 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue()
142 unsigned Reg = MRI->getDwarfRegNum(XCore::LR, true); in emitPrologue()
149 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII); in emitPrologue()
150 MBB.addLiveIn(XCore::LR); in emitPrologue()
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DXCoreISelDAGToDAG.cpp119 return CurDAG->getMachineNode(XCore::MKMSK_rus, dl, in Select()
127 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, in Select()
141 return CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32, in Select()
147 return CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, MVT::i32, in Select()
153 return CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, MVT::i32, in Select()
159 return CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, MVT::i32, in Select()
165 return CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, MVT::i32, in Select()
170 return CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, MVT::i32, in Select()
239 SDValue(CurDAG->getMachineNode(XCore::SETSR_branch_u6, dl, MVT::Glue, in SelectBRIND()
242 SDValue(CurDAG->getMachineNode(XCore::CLRSR_branch_u6, dl, MVT::Glue, in SelectBRIND()
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DXCore.td1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
10 // This is the top level entry point for the XCore target.
31 // XCore processors supported.
49 def XCore : Target {
DXCoreRegisterInfo.td1 //===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
11 // Declarations that describe the XCore register file
16 let Namespace = "XCore";
45 def GRRegs : RegisterClass<"XCore", [i32], 32,
54 def RRegs : RegisterClass<"XCore", [i32], 32,
DXCoreCallingConv.td1 //===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
9 // This describes the calling conventions for XCore architecture.
13 // XCore Return Value Calling Convention
21 // XCore Argument Calling Conventions
DXCoreAsmPrinter.cpp260 case XCore::DBG_VALUE: in EmitInstruction()
262 case XCore::ADD_2rus: in EmitInstruction()
271 case XCore::BR_JT: in EmitInstruction()
272 case XCore::BR_JT32: in EmitInstruction()
275 if (MI->getOpcode() == XCore::BR_JT) in EmitInstruction()
DXCoreISelLowering.cpp73 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); in XCoreTargetLowering()
81 setStackPointerRegisterToSaveRestore(XCore::SP); in XCoreTargetLowering()
153 setExceptionPointerRegister(XCore::R0); in XCoreTargetLowering()
154 setExceptionSelectorRegister(XCore::R1); in XCoreTargetLowering()
1147 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1182 XCore::R0, XCore::R1, XCore::R2, XCore::R3 in LowerCCCArguments()
1200 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1327 assert((MI->getOpcode() == XCore::SELECT_CC) && in EmitInstrWithCustomInserter()
1361 BuildMI(BB, dl, TII.get(XCore::BRFT_lru6)) in EmitInstrWithCustomInserter()
1377 TII.get(XCore::PHI), MI->getOperand(0).getReg()) in EmitInstrWithCustomInserter()
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DXCoreInstrFormats.td1 //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
17 let Namespace = "XCore";
26 // XCore pseudo instructions format
DXCoreInstrInfo.td1 //===-- XCoreInstrInfo.td - Target Description for XCore ---*- tablegen -*-===//
10 // This file describes the XCore instructions in TableGen format.
26 // XCore specific DAG Nodes.
1267 // ashr X, 32 is equivalent to ashr X, 31 on the XCore.
/freebsd-9-stable/contrib/llvm/lib/Target/XCore/Disassembler/
DXCoreDisassembler.cpp217 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo); in DecodeGRRegsRegisterClass()
229 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo); in DecodeRRegsRegisterClass()
292 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
295 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
298 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
301 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
304 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
307 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
310 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
313 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
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/freebsd-9-stable/contrib/llvm/tools/clang/include/clang/Basic/
DBuiltinsXCore.def1 //===--- BuiltinsXCore.def - XCore Builtin function database ----*- C++ -*-===//
10 // This file defines the XCore-specific builtin function database. Users of
DTargetBuiltins.h137 namespace XCore {
/freebsd-9-stable/contrib/llvm/lib/Target/XCore/MCTargetDesc/
DXCoreMCTargetDesc.cpp43 InitXCoreMCRegisterInfo(X, XCore::LR); in createXCoreMCRegisterInfo()
59 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, XCore::SP, 0); in createXCoreMCAsmInfo()
/freebsd-9-stable/contrib/llvm/include/llvm/IR/
DIntrinsicsXCore.td1 //==- IntrinsicsXCore.td - XCore intrinsics -*- tablegen -*-==//
10 // This file defines all of the XCore-specific intrinsics.
/freebsd-9-stable/contrib/llvm/tools/clang/lib/Driver/
DToolChains.cpp2861 XCore::XCore(const Driver &D, const llvm::Triple &Triple, in XCore() function in XCore
2866 Tool *XCore::buildAssembler() const { in buildAssembler()
2867 return new tools::XCore::Assemble(*this); in buildAssembler()
2870 Tool *XCore::buildLinker() const { in buildLinker()
2871 return new tools::XCore::Link(*this); in buildLinker()
2874 bool XCore::isPICDefault() const { in isPICDefault()
2878 bool XCore::isPIEDefault() const { in isPIEDefault()
2882 bool XCore::isPICDefaultForced() const { in isPICDefaultForced()
2886 bool XCore::SupportsProfiling() const { in SupportsProfiling()
2890 bool XCore::hasBlocksRuntime() const { in hasBlocksRuntime()
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DToolChains.h679 class LLVM_LIBRARY_VISIBILITY XCore : public ToolChain {
681 XCore(const Driver &D, const llvm::Triple &Triple,
DTools.h632 namespace XCore {
DDriver.cpp1981 TC = new toolchains::XCore(*this, Target, Args); in getToolChain()
DTools.cpp7125 void XCore::Assemble::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
7155 void XCore::Link::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
/freebsd-9-stable/contrib/llvm/tools/clang/lib/Basic/
DTargets.cpp5526 NumRecords = clang::XCore::LastTSBuiltin-Builtin::FirstTSBuiltin; in getTargetBuiltins()