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Searched refs:TSFlags (Results 1 – 25 of 48) sorted by relevance

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/freebsd-9-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp128 uint64_t TSFlags, unsigned &CurByte, raw_ostream &OS,
134 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
138 void EmitSegmentOverridePrefix(uint64_t TSFlags, unsigned &CurByte,
142 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
165 static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) { in isCDisp8() argument
166 assert(((TSFlags >> X86II::VEXShift) & X86II::EVEX) && in isCDisp8()
169 unsigned CD8E = (TSFlags >> X86II::EVEX_CD8EShift) & X86II::EVEX_CD8EMask; in isCDisp8()
170 unsigned CD8V = (TSFlags >> X86II::EVEX_CD8VShift) & X86II::EVEX_CD8VMask; in isCDisp8()
183 bool EVEX_b = (TSFlags >> X86II::VEXShift) & X86II::EVEX_B; in isCDisp8()
185 unsigned EVEX_LL = ((TSFlags >> X86II::VEXShift) & X86II::VEX_L) ? 1 : 0; in isCDisp8()
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DX86BaseInfo.h522 inline unsigned char getBaseOpcodeFor(uint64_t TSFlags) { in getBaseOpcodeFor() argument
523 return TSFlags >> X86II::OpcodeShift; in getBaseOpcodeFor()
526 inline bool hasImm(uint64_t TSFlags) { in hasImm() argument
527 return (TSFlags & X86II::ImmMask) != 0; in hasImm()
532 inline unsigned getSizeOfImm(uint64_t TSFlags) { in getSizeOfImm() argument
533 switch (TSFlags & X86II::ImmMask) { in getSizeOfImm()
547 inline unsigned isImmPCRel(uint64_t TSFlags) { in isImmPCRel() argument
548 switch (TSFlags & X86II::ImmMask) { in isImmPCRel()
597 inline int getMemoryOperandNo(uint64_t TSFlags, unsigned Opcode) { in getMemoryOperandNo() argument
598 switch (TSFlags & X86II::FormMask) { in getMemoryOperandNo()
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/freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCInst.cpp33 const uint64_t F = MCID->TSFlags; in getType()
52 const uint64_t F = MCID->TSFlags; in isSolo()
58 const uint64_t F = MCID->TSFlags; in isNewValue()
64 const uint64_t F = MCID->TSFlags; in hasNewValue()
70 const uint64_t F = MCID->TSFlags; in getNewValue()
118 const uint64_t F = MCID->TSFlags; in isExtended()
124 const uint64_t F = MCID->TSFlags; in isExtendable()
130 const uint64_t F = MCID->TSFlags; in getBitCount()
136 const uint64_t F = MCID->TSFlags; in getCExtOpNum()
142 const uint64_t F = MCID->TSFlags; in isOperandExtended()
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/freebsd-9-stable/contrib/llvm/lib/Target/X86/
DX86CodeEmitter.cpp65 void emitOpcodePrefix(uint64_t TSFlags, int MemOperand,
69 void emitVEXOpcodePrefix(uint64_t TSFlags, int MemOperand,
73 void emitSegmentOverridePrefix(uint64_t TSFlags,
167 if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo) in determineREX()
169 if (Desc.TSFlags & X86II::REX_W) in determineREX()
188 switch (Desc.TSFlags & X86II::FormMask) { in determineREX()
657 void Emitter<CodeEmitter>::emitOpcodePrefix(uint64_t TSFlags, in emitOpcodePrefix() argument
662 if (Desc->TSFlags & X86II::LOCK) in emitOpcodePrefix()
666 emitSegmentOverridePrefix(TSFlags, MemOperand, MI); in emitOpcodePrefix()
669 if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) in emitOpcodePrefix()
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DX86InstrFormats.td219 // TSFlags layout should be kept in sync with X86InstrInfo.h.
220 let TSFlags{5-0} = FormBits;
221 let TSFlags{6} = hasOpSizePrefix;
222 let TSFlags{7} = hasAdSizePrefix;
223 let TSFlags{12-8} = Prefix;
224 let TSFlags{13} = hasREX_WPrefix;
225 let TSFlags{16-14} = ImmT.Value;
226 let TSFlags{19-17} = FPForm.Value;
227 let TSFlags{20} = hasLockPrefix;
228 let TSFlags{22-21} = SegOvrBits;
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/freebsd-9-stable/contrib/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.cpp72 unsigned TSFlags = in isMoveInstr() local
73 (MI.getDesc().TSFlags & NVPTX::SimpleMoveMask) >> NVPTX::SimpleMoveShift; in isMoveInstr()
74 isMove = (TSFlags == 1); in isMoveInstr()
114 unsigned TSFlags = in isLoadInstr() local
115 (MI.getDesc().TSFlags & NVPTX::isLoadMask) >> NVPTX::isLoadShift; in isLoadInstr()
116 isLoad = (TSFlags == 1); in isLoadInstr()
125 unsigned TSFlags = in isStoreInstr() local
126 (MI.getDesc().TSFlags & NVPTX::isStoreMask) >> NVPTX::isStoreShift; in isStoreInstr()
127 isStore = (TSFlags == 1); in isStoreInstr()
DNVPTXInstrFormats.td39 let TSFlags{3-0} = VecInstType;
40 let TSFlags{4-4} = IsSimpleMove;
41 let TSFlags{5-5} = IsLoad;
42 let TSFlags{6-6} = IsStore;
/freebsd-9-stable/contrib/llvm/lib/Target/R600/
DR600InstrFormats.td41 let TSFlags{4} = Trig;
42 let TSFlags{5} = Op3;
46 let TSFlags{6} = isVector;
47 let TSFlags{8-7} = FlagOperandIdx;
48 let TSFlags{9} = HasNativeOperands;
49 let TSFlags{10} = Op1;
50 let TSFlags{11} = Op2;
51 let TSFlags{12} = VTXInst;
52 let TSFlags{13} = TEXInst;
53 let TSFlags{14} = ALUInst;
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DSIInstrFormats.td28 let TSFlags{0} = VM_CNT;
29 let TSFlags{1} = EXP_CNT;
30 let TSFlags{2} = LGKM_CNT;
31 let TSFlags{3} = MIMG;
32 let TSFlags{4} = SMRD;
33 let TSFlags{5} = VOP1;
34 let TSFlags{6} = VOP2;
35 let TSFlags{7} = VOP3;
36 let TSFlags{8} = VOPC;
37 let TSFlags{9} = SALU;
DSIInsertWaits.cpp125 uint64_t TSFlags = TII->get(MI.getOpcode()).TSFlags; in getHwCounts() local
128 Result.Named.VM = !!(TSFlags & SIInstrFlags::VM_CNT); in getHwCounts()
131 Result.Named.EXP = !!(TSFlags & SIInstrFlags::EXP_CNT && in getHwCounts()
135 if (TSFlags & SIInstrFlags::LGKM_CNT) { in getHwCounts()
DR600Defines.h62 #define IS_VTX(desc) ((desc).TSFlags & R600_InstFlag::VTX_INST)
63 #define IS_TEX(desc) ((desc).TSFlags & R600_InstFlag::TEX_INST)
DSIInstrInfo.cpp253 return get(Opcode).TSFlags & SIInstrFlags::MIMG; in isMIMG()
257 return get(Opcode).TSFlags & SIInstrFlags::SMRD; in isSMRD()
261 return get(Opcode).TSFlags & SIInstrFlags::VOP1; in isVOP1()
265 return get(Opcode).TSFlags & SIInstrFlags::VOP2; in isVOP2()
269 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
273 return get(Opcode).TSFlags & SIInstrFlags::VOPC; in isVOPC()
277 return get(MI.getOpcode()).TSFlags & SIInstrFlags::SALU; in isSALUInstr()
DR600InstrInfo.cpp42 return get(MI.getOpcode()).TSFlags & R600_InstFlag::TRIG; in isTrig()
46 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; in isVector()
135 unsigned TargetFlags = get(Opcode).TSFlags; in isALUInstr()
141 unsigned TargetFlags = get(Opcode).TSFlags; in hasInstrModifiers()
149 unsigned TargetFlags = get(Opcode).TSFlags; in isLDSInstr()
201 return (get(Opcode).TSFlags & R600_InstFlag::IS_EXPORT); in isExport()
1304 return GET_FLAG_OPERAND_IDX(get(MI.getOpcode()).TSFlags) != 0; in hasFlagOperand()
1309 unsigned TargetFlags = get(MI->getOpcode()).TSFlags; in getFlagOp()
1364 unsigned TargetFlags = get(MI->getOpcode()).TSFlags; in addFlag()
1385 unsigned TargetFlags = get(MI->getOpcode()).TSFlags; in clearFlag()
DR600OptimizeVectorRegisters.cpp132 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) in canSwizzle()
248 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) in SwizzleInput()
329 if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::TEX_INST) { in runOnMachineFunction()
/freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp99 uint64_t TSFlags = MCID.TSFlags; in GetInstrType() local
101 isFirst = TSFlags & PPCII::PPC970_First; in GetInstrType()
102 isSingle = TSFlags & PPCII::PPC970_Single; in GetInstrType()
103 isCracked = TSFlags & PPCII::PPC970_Cracked; in GetInstrType()
104 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask); in GetInstrType()
/freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonInstrFormats.td102 let TSFlags{4-0} = Type.Value;
106 let TSFlags{5} = isSolo;
110 let TSFlags{6} = isPredicated;
112 let TSFlags{7} = isPredicatedFalse;
114 let TSFlags{8} = isPredicatedNew;
118 let TSFlags{9} = isNewValue; // New-value consumer insn.
120 let TSFlags{10} = hasNewValue; // New-value producer insn.
122 let TSFlags{13-11} = opNewValue; // New-value produced operand.
124 let TSFlags{15-14} = opNewBits; // New-value opcode bits location: 0, 8, 16.
126 let TSFlags{16} = isNVStorable; // Store that can become new-value store.
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DHexagonInstrInfo.cpp587 const uint64_t F = MID.TSFlags; in isExtendable()
608 const uint64_t F = MI->getDesc().TSFlags; in isExtended()
754 const uint64_t F = MI->getDesc().TSFlags; in isNewValueStore()
760 const uint64_t F = get(Opcode).TSFlags; in isNewValueStore()
980 const uint64_t F = MI->getDesc().TSFlags; in isPredicated()
986 const uint64_t F = get(Opcode).TSFlags; in isPredicated()
992 const uint64_t F = MI->getDesc().TSFlags; in isPredicatedTrue()
1000 const uint64_t F = get(Opcode).TSFlags; in isPredicatedTrue()
1009 const uint64_t F = MI->getDesc().TSFlags; in isPredicatedNew()
1016 const uint64_t F = get(Opcode).TSFlags; in isPredicatedNew()
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/freebsd-9-stable/contrib/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
44 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
57 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) { in getHazardType()
DARMCodeEmitter.cpp465 unsigned Reloc = ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm) in getMachineOpValue()
545 switch (MI.getDesc().TSFlags & ARMII::FormMask) { in emitInstruction()
1075 bool isUnary = MCID.TSFlags & ARMII::UnaryDP; in emitDataProcessingInstruction()
1088 if ((MCID.TSFlags & ARMII::FormMask) == ARMII::DPSoRegFrm) { in emitDataProcessingInstruction()
1110 unsigned Form = MCID.TSFlags & ARMII::FormMask; in emitLoadStoreInstruction()
1111 bool IsPrePost = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitLoadStoreInstruction()
1188 unsigned Form = MCID.TSFlags & ARMII::FormMask; in emitMiscLoadStoreInstruction()
1189 bool IsPrePost = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitMiscLoadStoreInstruction()
1273 bool IsUpdating = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitLoadStoreMultipleInstruction()
1620 if ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPBinaryFrm) in emitVFPArithInstruction()
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DARMBaseRegisterInfo.cpp434 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset()
626 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal()
742 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4 || in eliminateFrameIndex()
743 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode6) && in eliminateFrameIndex()
/freebsd-9-stable/contrib/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp37 uint64_t TSFlags = Desc.TSFlags; in printInst() local
39 if (TSFlags & X86II::LOCK) in printInst()
DX86ATTInstPrinter.cpp45 uint64_t TSFlags = Desc.TSFlags; in printInst() local
47 if (TSFlags & X86II::LOCK) in printInst()
/freebsd-9-stable/contrib/llvm/lib/Target/R600/MCTargetDesc/
DR600MCCodeEmitter.cpp135 ((Desc.TSFlags & R600_InstFlag::OP1) || in EncodeInstruction()
136 Desc.TSFlags & R600_InstFlag::OP2)) { in EncodeInstruction()
173 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags)) { in getMachineOpValue()
/freebsd-9-stable/contrib/llvm/lib/Target/Mips/
DMipsCodeEmitter.cpp168 uint64_t TSFlags = MI.getDesc().TSFlags; in getRelocation() local
169 uint64_t Form = TSFlags & MipsII::FormMask; in getRelocation()
312 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) && in emitInstruction()
/freebsd-9-stable/contrib/llvm/lib/Target/SystemZ/
DSystemZElimCompare.cpp236 unsigned MIFlags = Desc.TSFlags; in adjustCCMasksForInstr()
242 unsigned CompareFlags = Compare->getDesc().TSFlags; in adjustCCMasksForInstr()
258 unsigned Flags = MI->getDesc().TSFlags; in adjustCCMasksForInstr()

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