| /freebsd-9-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 731 SETUGT, // 1 0 1 0 True if unordered or greater than enumerator
759 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; in isUnsignedIntSetCC()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 173 case ISD::SETUGT: in softenSetCCOperands()
1188 if ((Cond == ISD::SETULT && C1 == 2) || (Cond == ISD::SETUGT && C1 == 1)){ in SimplifySetCC()
1304 case ISD::SETUGT: in SimplifySetCC()
1327 case ISD::SETUGT: in SimplifySetCC()
1474 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); in SimplifySetCC()
1489 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal) in SimplifySetCC()
1495 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal) in SimplifySetCC()
1507 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1) in SimplifySetCC()
1516 if (Cond == ISD::SETUGT && in SimplifySetCC()
1578 Cond == ISD::SETULE || Cond == ISD::SETUGT) { in SimplifySetCC()
[all …]
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| D | SelectionDAGDumper.cpp | 297 case ISD::SETUGT: return "setugt"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 838 case ISD::SETUGT: in PromoteSetCCOperands()
2281 ISD::SETULT : ISD::SETUGT); in ExpandIntRes_UADDSUBO()
2565 case ISD::SETUGT: LowCC = ISD::SETUGT; break; in IntegerExpandSetCCOperands()
2600 CCCode == ISD::SETUGT || CCCode == ISD::SETULT))) { in IntegerExpandSetCCOperands()
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| D | LegalizeDAG.cpp | 1658 case ISD::SETUGT: in LegalizeSetCCCondCode()
3218 Tmp1, Tmp2, ISD::SETUGT); in ExpandNode()
3530 ISD::SETULT : ISD::SETUGT)); in ExpandNode()
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| D | SelectionDAG.cpp | 262 case ISD::SETUGT: in isSignedOp()
312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE in getSetCCAndOperation()
1672 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); in FoldSetCC()
1721 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || in FoldSetCC()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 162 case FCmpInst::FCMP_UGT: return ISD::SETUGT; in getFCmpCondCode()
178 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
198 case ICmpInst::ICMP_UGT: return ISD::SETUGT; in getICmpCondCode()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 30 IntRegs:$fval, SETUGT)),
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| D | HexagonISelLowering.cpp | 1144 setCondCodeAction(ISD::SETUGT, MVT::f32, Legal); in HexagonTargetLowering()
1145 setCondCodeAction(ISD::SETUGT, MVT::f64, Legal); in HexagonTargetLowering()
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 593 case ISD::SETUGT: return PPC::PRED_GT; in getPredicateForSetCC()
625 case ISD::SETUGT: return 1; in getCRIdxForSetCC()
662 case ISD::SETUGT: in getVCmpInst()
818 case ISD::SETUGT: in SelectSETCC()
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| D | PPCISelLowering.cpp | 301 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in PPCTargetLowering()
302 setCondCodeAction(ISD::SETUGT, MVT::f64, Expand); in PPCTargetLowering()
487 setCondCodeAction(ISD::SETUGT, MVT::v4f32, Expand); in PPCTargetLowering()
4742 case ISD::SETUGT: in LowerSELECT_CC()
4779 case ISD::SETUGT: in LowerSELECT_CC()
4917 Cond, DAG.getConstant(1, MVT::i64), ISD::SETUGT); in LowerINT_TO_FP()
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| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUInstructions.td | 81 def COND_UGT : PatLeaf <(cond), [{return N->get() == ISD::SETUGT;}]>;
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| D | AMDILISelLowering.cpp | 126 setOperationAction(ISD::SETUGT, VT, Expand); in InitAMDILLowering()
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| D | SIISelLowering.cpp | 63 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in SITargetLowering()
70 setCondCodeAction(ISD::SETUGT, MVT::f64, Expand); in SITargetLowering()
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| D | AMDGPUISelLowering.cpp | 476 case ISD::SETUGT: in LowerMinMax()
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| D | R600ISelLowering.cpp | 51 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in R600TargetLowering()
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1787 case ISD::SETUGT: return A64CC::HI; in IntCCToA64CC()
1840 CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; in getSelectableIntSetCC()
1852 case ISD::SETUGT: in getSelectableIntSetCC()
1887 case ISD::SETUGT: CondCode = A64CC::HI; break; in FPCCToA64CC()
2574 case ISD::SETUGT: in LowerVectorSETCC()
2674 case ISD::SETUGT: in LowerVectorSETCC()
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| /freebsd-9-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 502 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
848 (setcc node:$lhs, node:$rhs, SETUGT)>;
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1227 case ISD::SETUGT: return ARMCC::HI; in IntCCToARMCC()
1252 case ISD::SETUGT: CondCode = ARMCC::HI; break; in FPCCToARMCC()
3156 CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; in getARMCmp()
3168 case ISD::SETUGT: in getARMCmp()
3294 else if (CC == ISD::SETUGT || CC == ISD::SETOGT || CC == ISD::SETOLT || in checkVSELConstraints()
3313 CC == ISD::SETUGT) { in checkVSELConstraints()
3385 if (CC == ISD::SETOGT || CC == ISD::SETUGT) in LowerSELECT_CC()
4199 case ISD::SETUGT: Swap = true; // Fallthrough in LowerVSETCC()
4231 case ISD::SETUGT: Opc = ARMISD::VCGTU; break; in LowerVSETCC()
10059 case ISD::SETUGT: in PerformSELECT_CCCombine()
[all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsDSPInstrInfo.td | 1371 def : DSPSetCCPatInv<PseudoCMPU_LE_QB, PseudoPICK_QB, v4i8, SETUGT>;
1384 def : DSPSelectCCPatInv<PseudoCMPU_LE_QB, PseudoPICK_QB, v4i8, SETUGT>;
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| D | MipsSEISelLowering.cpp | 204 setCondCodeAction(ISD::SETUGT, Ty, Expand); in addMSAIntType()
240 setCondCodeAction(ISD::SETUGT, Ty, Expand); in addMSAFloatType()
864 case ISD::SETUGT: in isLegalDSPCondCode()
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| /freebsd-9-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 852 case ISD::SETUGT: in EmitCMP()
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 3450 case ISD::SETUGT: return X86::COND_A; in TranslateX86CC()
3469 case ISD::SETUGT: in TranslateX86CC()
3491 case ISD::SETUGT: // flipped in TranslateX86CC()
9806 case ISD::SETUGT: SSECC = 6; break; in translateX86FSETCC()
9866 case ISD::SETUGT: Unsigned = true; in LowerIntVSETCC_AVX512()
9963 case ISD::SETUGT: Opc = MaskResult? X86ISD::PCMPGTM: X86ISD::PCMPGT; in LowerVSETCC()
16567 case ISD::SETUGT: in matchIntegerMINMAX()
16585 case ISD::SETUGT: in matchIntegerMINMAX()
16667 case ISD::SETUGT: in PerformSELECTCombine()
16706 case ISD::SETUGT: in PerformSELECTCombine()
[all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1336 case ISD::SETUGT: return SPCC::ICC_GU; in IntCondCCodeToICC()
1360 case ISD::SETUGT: return SPCC::FCC_UG; in FPCondCCodeToFCC()
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| /freebsd-9-stable/contrib/llvm/lib/Target/NVPTX/ |
| D | NVPTXVector.td | 970 (setcc node:$lhs, node:$rhs, SETUGT)>;
|