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Searched refs:RRR (Results 1 – 5 of 5) sorted by relevance

/freebsd-9-stable/contrib/binutils/include/opcode/
Dspu-insns.h207 APUOP(M_SHUFB, RRR, 0x580, "shufb", _A4(A_C,A_A,A_B,A_T), 02111, SHUF) /* SHUFfleBytes RC<-f(RA,R…
329 APUOP(M_FMA, RRR, 0x700, "fma", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMAdd RC<-RT+RA*RB */
330 APUOP(M_FMS, RRR, 0x780, "fms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMSub RC<-RA*RB-RT */
331 APUOP(M_FNMS, RRR, 0x680, "fnms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FNMSub RC<-RT-RA*RB…
332 APUOP(M_MPYA, RRR, 0x600, "mpya", _A4(A_C,A_A,A_B,A_T), 02111, FP7) /* MPYA RC<-RA*RB+RT…
333 APUOP(M_SELB, RRR, 0x400, "selb", _A4(A_C,A_A,A_B,A_T), 02111, FX2) /* SELectBits RC<-RA&RT|RB…
Dspu.h25 RRR, enumerator
/freebsd-9-stable/contrib/llvm/lib/Target/Mips/
DMips16InstrFormats.td249 // Format RRR instruction class in Mips : <|opcode|rx|ry|rz|f|>
451 // <EXTEND|select|p4|p3|RRR|p2|p1|p0>
461 bits<5> RRR = 0b11100;
470 let Inst{15-11} = RRR;
DMips16InstrInfo.td378 // RRR-type instruction format
/freebsd-9-stable/contrib/binutils/opcodes/
Dspu-dis.c64 && index->insn_type == RRR) in get_index_for_opcode()