Searched refs:Op5 (Results 1 – 3 of 3) sorted by relevance
| /freebsd-9-stable/contrib/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 659 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local
664 S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5, Op6); in DecodeL6RInstruction()
671 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder); in DecodeL6RInstruction()
693 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local
698 S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5); in DecodeL5RInstruction()
706 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder); in DecodeL5RInstruction()
|
| /freebsd-9-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 837 SDValue Op3, SDValue Op4, SDValue Op5);
|
| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 5141 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands() argument
5142 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; in UpdateNodeOperands()
|