Searched refs:MI1 (Results 1 – 6 of 6) sorted by relevance
| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 161 bool ArePredicatesComplements(MachineInstr* MI1, MachineInstr* MI2,
863 bool HexagonPacketizerList::ArePredicatesComplements (MachineInstr* MI1, in ArePredicatesComplements() argument
870 if (getPredicateSense(MI1, QII) == PK_Unknown || in ArePredicatesComplements()
875 SUnit* SU = MIToSUnit[MI1]; in ArePredicatesComplements()
934 unsigned PReg1 = getPredicatedRegister(MI1, QII); in ArePredicatesComplements()
939 (getPredicateSense(MI1, QII) != getPredicateSense(MI2, QII)) && in ArePredicatesComplements()
940 (QII->isDotNewInst(MI1) == QII->isDotNewInst(MI2))); in ArePredicatesComplements()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 318 MachineInstr &MI1 = *MII; in ExpandFPMLxInstruction()
319 dbgs() << " " << MI1; in ExpandFPMLxInstruction()
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| D | ARMBaseInstrInfo.h | 143 const MachineInstr *MI1,
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| D | ARMBaseInstrInfo.cpp | 1321 const MachineInstr *MI1, in produceSameValue() argument
1333 if (MI1->getOpcode() != Opcode) in produceSameValue()
1335 if (MI0->getNumOperands() != MI1->getNumOperands()) in produceSameValue()
1339 const MachineOperand &MO1 = MI1->getOperand(1); in produceSameValue()
1370 if (MI1->getOpcode() != Opcode) in produceSameValue()
1372 if (MI0->getNumOperands() != MI1->getNumOperands()) in produceSameValue()
1376 unsigned Addr1 = MI1->getOperand(1).getReg(); in produceSameValue()
1395 const MachineOperand &MO1 = MI1->getOperand(i); in produceSameValue()
1402 return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 323 const MachineInstr *MI1, in produceSameValue() argument
325 return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
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| /freebsd-9-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 259 const MachineInstr *MI1,
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