| /freebsd-9-stable/contrib/llvm/patches/ |
| D | patch-r262261-llvm-r199775-sparc.diff | 22 -static MCOperand createPCXCallOP(MCSymbol *Label,
26 +static MCOperand createSparcMCOperand(SparcMCExpr::VariantKind Kind,
33 return MCOperand::CreateExpr(expr);
36 +static MCOperand createPCXCallOP(MCSymbol *Label,
41 static MCOperand createPCXRelExprOp(SparcMCExpr::VariantKind Kind,
47 -static void EmitOR(MCStreamer &OutStreamer, MCOperand &RS1,
48 - MCOperand &Imm, MCOperand &RD)
50 + MCOperand &RS1, MCOperand &Src2, MCOperand &RD)
67 + MCOperand &RS1, MCOperand &Imm, MCOperand &RD) {
72 - MCOperand &RS1, MCOperand &RS2, MCOperand &RD)
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| D | patch-r262261-llvm-r198567-sparc.diff | 16 - MCOperand &RS1, MCOperand &RS2, MCOperand &RD)
18 + MCOperand &RS1, MCOperand &RS2, MCOperand &RD)
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| /freebsd-9-stable/contrib/llvm/include/llvm/MC/ |
| D | MCInst.h | 33 class MCOperand {
53 MCOperand() : Kind(kInvalid), FPImmVal(0.0) {} in MCOperand() function
111 static MCOperand CreateReg(unsigned Reg) { in CreateReg()
112 MCOperand Op; in CreateReg()
117 static MCOperand CreateImm(int64_t Val) { in CreateImm()
118 MCOperand Op; in CreateImm()
123 static MCOperand CreateFPImm(double Val) { in CreateFPImm()
124 MCOperand Op; in CreateFPImm()
129 static MCOperand CreateExpr(const MCExpr *Val) { in CreateExpr()
130 MCOperand Op; in CreateExpr()
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| D | MCInstBuilder.h | 33 Inst.addOperand(MCOperand::CreateReg(Reg)); in addReg()
39 Inst.addOperand(MCOperand::CreateImm(Val)); in addImm()
45 Inst.addOperand(MCOperand::CreateFPImm(Val)); in addFPImm()
51 Inst.addOperand(MCOperand::CreateExpr(Val)); in addExpr()
57 Inst.addOperand(MCOperand::CreateInst(Val)); in addInst()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 76 static MCOperand createSparcMCOperand(SparcMCExpr::VariantKind Kind, in createSparcMCOperand()
81 return MCOperand::CreateExpr(expr); in createSparcMCOperand()
84 static MCOperand createPCXCallOP(MCSymbol *Label, in createPCXCallOP()
89 static MCOperand createPCXRelExprOp(SparcMCExpr::VariantKind Kind, in createPCXRelExprOp()
104 return MCOperand::CreateExpr(expr); in createPCXRelExprOp()
108 MCOperand &Callee) in EmitCall()
117 MCOperand &Imm, MCOperand &RD) in EmitSETHI()
127 MCOperand &RS1, MCOperand &Src2, MCOperand &RD) in EmitBinary()
138 MCOperand &RS1, MCOperand &Imm, MCOperand &RD) { in EmitOR()
143 MCOperand &RS1, MCOperand &RS2, MCOperand &RD) { in EmitADD()
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| D | SparcMCInstLower.cpp | 31 static MCOperand LowerSymbolOperand(const MachineInstr *MI, in LowerSymbolOperand()
66 return MCOperand::CreateExpr(expr); in LowerSymbolOperand()
69 static MCOperand LowerOperand(const MachineInstr *MI, in LowerOperand()
77 return MCOperand::CreateReg(MO.getReg()); in LowerOperand()
80 return MCOperand::CreateImm(MO.getImm()); in LowerOperand()
92 return MCOperand(); in LowerOperand()
104 MCOperand MCOp = LowerOperand(MI, MO, AP); in LowerSparcMachineInstrToMCInst()
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 167 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum)); in translateRegister()
288 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4))); in translateImmediate()
291 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4))); in translateImmediate()
294 mcInst.addOperand(MCOperand::CreateReg(X86::ZMM0 + (immediate >> 4))); in translateImmediate()
317 mcInst.addOperand(MCOperand::CreateImm(immediate)); in translateImmediate()
348 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break; in translateRMRegister()
378 MCOperand baseReg; in translateRMMemory()
379 MCOperand scaleAmount; in translateRMMemory()
380 MCOperand indexReg; in translateRMMemory()
381 MCOperand displacement; in translateRMMemory()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 445 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeGPR64RegisterClass()
456 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeGPR32RegisterClass()
485 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGR64RegisterClass()
497 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGR32RegisterClass()
509 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGRH32RegisterClass()
520 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeCCRRegisterClass()
531 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFCCRegisterClass()
547 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeMem()
550 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeMem()
551 Inst.addOperand(MCOperand::CreateReg(Base)); in DecodeMem()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 111 const MCOperand &Dst = MI->getOperand(0); in printInst()
112 const MCOperand &MO1 = MI->getOperand(1); in printInst()
113 const MCOperand &MO2 = MI->getOperand(2); in printInst()
114 const MCOperand &MO3 = MI->getOperand(3); in printInst()
134 const MCOperand &Dst = MI->getOperand(0); in printInst()
135 const MCOperand &MO1 = MI->getOperand(1); in printInst()
136 const MCOperand &MO2 = MI->getOperand(2); in printInst()
277 MCOperand NewReg; in printInst()
282 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg(Reg, ARM::gsub_0, in printInst()
300 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 73 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
418 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
448 const MCOperand &MO = MI.getOperand(OpIdx); in EncodeAddrModeOpValues()
449 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues()
477 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue()
513 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLTargetOpValue()
525 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLXTargetOpValue()
536 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBRTargetOpValue()
547 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBCCTargetOpValue()
558 const MCOperand MO = MI.getOperand(OpIdx); in getThumbCBTargetOpValue()
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 55 const MCOperand &MOImm = MI->getOperand(OpNum); in printOffsetSImm9Operand()
94 const MCOperand &Imm12Op = MI->getOperand(OpNum); in printAddSubImmLSL0Operand()
118 const MCOperand &MO = MI->getOperand(OpNum); in printBareImmOperand()
125 const MCOperand &ImmROp = MI->getOperand(OpNum); in printBFILSBOperand()
133 const MCOperand &ImmSOp = MI->getOperand(OpNum); in printBFIWidthOperand()
142 const MCOperand &ImmSOp = MI->getOperand(OpNum); in printBFXWidthOperand()
143 const MCOperand &ImmROp = MI->getOperand(OpNum - 1); in printBFXWidthOperand()
156 const MCOperand &CRx = MI->getOperand(OpNum); in printCRxOperand()
165 const MCOperand &ScaleOp = MI->getOperand(OpNum); in printCVTFixedPosOperand()
173 const MCOperand &MOImm8 = MI->getOperand(OpNum); in printFPImmOperand()
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 398 Inst.addOperand(MCOperand::CreateReg(RRegs[getReg()])); in addRegGPRCOperands()
403 Inst.addOperand(MCOperand::CreateReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()
408 Inst.addOperand(MCOperand::CreateReg(XRegs[getReg()])); in addRegG8RCOperands()
413 Inst.addOperand(MCOperand::CreateReg(XRegsNoX0[getReg()])); in addRegG8RCNoX0Operands()
432 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()])); in addRegF4RCOperands()
437 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()])); in addRegF8RCOperands()
442 Inst.addOperand(MCOperand::CreateReg(VRegs[getReg()])); in addRegVRRCOperands()
447 Inst.addOperand(MCOperand::CreateReg(CRBITRegs[getCRBit()])); in addRegCRBITRCOperands()
452 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCCReg()])); in addRegCRRCOperands()
457 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCRBitMask()])); in addCRBitMaskOperands()
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| /freebsd-9-stable/contrib/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 56 Inst.addOperand(MCOperand::CreateReg(RegNo)); in decodeRegisterClass()
111 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand()
118 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
172 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address)); in decodePCDBLOperand()
193 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand()
194 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand()
203 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand()
204 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
214 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand()
215 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand()
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| /freebsd-9-stable/contrib/llvm/lib/Target/XCore/ |
| D | XCoreMCInstLower.cpp | 35 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
71 return MCOperand::CreateExpr(MCSym); in LowerSymbolOperand()
78 return MCOperand::CreateExpr(Add); in LowerSymbolOperand()
81 MCOperand XCoreMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand()
90 return MCOperand::CreateReg(MO.getReg()); in LowerOperand()
92 return MCOperand::CreateImm(MO.getImm() + offset); in LowerOperand()
104 return MCOperand(); in LowerOperand()
112 MCOperand MCOp = LowerOperand(MO); in Lower()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMMCInstLower.cpp | 26 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO, in GetSymbolRef()
62 return MCOperand::CreateExpr(Expr); in GetSymbolRef()
67 MCOperand &MCOp) { in lowerOperand()
75 MCOp = MCOperand::CreateReg(MO.getReg()); in lowerOperand()
78 MCOp = MCOperand::CreateImm(MO.getImm()); in lowerOperand()
81 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( in lowerOperand()
104 MCOp = MCOperand::CreateFPImm(Val.convertToDouble()); in lowerOperand()
121 MCOperand MCOp; in LowerARMMachineInstrToMCInst()
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| D | ARMInstrInfo.cpp | 40 NopInst.addOperand(MCOperand::CreateImm(0)); in getNoopForMachoTarget()
41 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
42 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
45 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); in getNoopForMachoTarget()
46 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); in getNoopForMachoTarget()
47 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
48 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
49 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonMCInstLower.cpp | 27 static MCOperand GetSymbolRef(const MachineOperand& MO, const MCSymbol* Symbol, in GetSymbolRef()
38 return (MCOperand::CreateExpr(ME)); in GetSymbolRef()
49 MCOperand MCO; in HexagonLowerToMC()
58 MCO = MCOperand::CreateReg(MO.getReg()); in HexagonLowerToMC()
64 MCO = MCOperand::CreateImm(*Val.bitcastToAPInt().getRawData()); in HexagonLowerToMC()
68 MCO = MCOperand::CreateImm(MO.getImm()); in HexagonLowerToMC()
71 MCO = MCOperand::CreateExpr in HexagonLowerToMC()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1531 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
1533 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
1535 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
1540 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands()
1542 Inst.addOperand(MCOperand::CreateReg(RegNum)); in addCondCodeOperands()
1547 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocNumOperands()
1552 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocRegOperands()
1557 Inst.addOperand(MCOperand::CreateImm(CoprocOption.Val)); in addCoprocOptionOperands()
1562 Inst.addOperand(MCOperand::CreateImm(ITMask.Mask)); in addITMaskOperands()
1567 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands()
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64MCInstLower.cpp | 30 MCOperand
96 return MCOperand::CreateExpr(Expr); in lowerSymbolOperand()
100 MCOperand &MCOp) const { in lowerOperand()
107 MCOp = MCOperand::CreateReg(MO.getReg()); in lowerOperand()
110 MCOp = MCOperand::CreateImm(MO.getImm()); in lowerOperand()
114 MCOp = MCOperand::CreateFPImm(0.0); in lowerOperand()
127 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( in lowerOperand()
153 MCOperand MCOp; in LowerAArch64MachineInstrToMCInst()
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 71 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
119 const MCOperand &MO = MI.getOperand(OpNo); in getDirectBrEncoding()
130 const MCOperand &MO = MI.getOperand(OpNo); in getCondBrEncoding()
142 const MCOperand &MO = MI.getOperand(OpNo); in getAbsDirectBrEncoding()
154 const MCOperand &MO = MI.getOperand(OpNo); in getAbsCondBrEncoding()
165 const MCOperand &MO = MI.getOperand(OpNo); in getImm16Encoding()
181 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIEncoding()
199 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIXEncoding()
212 const MCOperand &MO = MI.getOperand(OpNo); in getTLSRegEncoding()
228 const MCOperand &MO = MI.getOperand(OpNo+1); in getTLSCallEncoding()
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 310 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64RegisterClass()
321 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64xspRegisterClass()
332 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR32RegisterClass()
343 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR32wspRegisterClass()
354 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR8RegisterClass()
365 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR16RegisterClass()
377 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR32RegisterClass()
388 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR64RegisterClass()
408 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR128RegisterClass()
429 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64noxzrRegisterClass()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 572 MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
577 MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
636 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
639 MI.insert(I, MCOperand::CreateReg(0)); in AddThumbPredicate()
641 MI.insert(I, MCOperand::CreateReg(ARM::CPSR)); in AddThumbPredicate()
646 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
649 MI.insert(I, MCOperand::CreateReg(0)); in AddThumbPredicate()
651 MI.insert(I, MCOperand::CreateReg(ARM::CPSR)); in AddThumbPredicate()
882 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPRRegisterClass()
906 Inst.addOperand(MCOperand::CreateReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSRRegisterClass()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 342 Inst.addOperand(MCOperand::CreateReg(getReg())); in addRegOperands()
347 Inst.addOperand(MCOperand::CreateReg(getPtrReg())); in addPtrRegOperands()
353 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
355 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
357 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
369 Inst.addOperand(MCOperand::CreateReg(getMemBase())); in addMemOperands()
473 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addRegAsmOperands()
572 NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO)); in processInstruction()
573 NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO)); in processInstruction()
574 NopInst.addOperand(MCOperand::CreateImm(0)); in processInstruction()
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsMCInstLower.cpp | 35 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
106 return MCOperand::CreateExpr(MCSym); in LowerSymbolOperand()
113 return MCOperand::CreateExpr(Add); in LowerSymbolOperand()
128 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand()
137 return MCOperand::CreateReg(MO.getReg()); in LowerOperand()
139 return MCOperand::CreateImm(MO.getImm() + offset); in LowerOperand()
151 return MCOperand(); in LowerOperand()
159 MCOperand MCOp = LowerOperand(MO); in Lower()
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| /freebsd-9-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430MCInstLower.cpp | 91 MCOperand MSP430MCInstLower::
106 return MCOperand::CreateExpr(Expr); in LowerSymbolOperand()
115 MCOperand MCOp; in Lower()
123 MCOp = MCOperand::CreateReg(MO.getReg()); in Lower()
126 MCOp = MCOperand::CreateImm(MO.getImm()); in Lower()
129 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( in Lower()
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