Searched refs:ImpDefs (Results 1 – 8 of 8) sorted by relevance
| /freebsd-9-stable/contrib/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 548 if (const uint16_t *ImpDefs = ImplicitDefs) variable
549 for (; *ImpDefs; ++ImpDefs)
550 if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs)))
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | PHIElimination.cpp | 94 SmallPtrSet<MachineInstr*, 4> ImpDefs; member in __anonff9c5a8e0111::PHIElimination
152 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), in runOnMachineFunction()
153 E = ImpDefs.end(); I != E; ++I) { in runOnMachineFunction()
172 ImpDefs.clear(); in runOnMachineFunction()
394 ImpDefs.insert(DefMI); in LowerPHINode()
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| D | MachineInstr.cpp | 522 for (const uint16_t *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; ++ImpDefs) in addImplicitDefUseOperands() local
523 addOperand(MF, MachineOperand::CreateReg(*ImpDefs, true, true)); in addImplicitDefUseOperands()
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 102 ArrayRef<unsigned> ImpDefs);
292 ArrayRef<unsigned> ImpDefs) { in MergeOps() argument
361 for (unsigned i = 0, e = ImpDefs.size(); i != e; ++i) in MergeOps()
362 MIB.addReg(ImpDefs[i], RegState::ImplicitDefine); in MergeOps()
454 SmallVector<unsigned, 8> ImpDefs; in MergeOpsUpdate() local
468 if (std::find(ImpDefs.begin(), ImpDefs.end(), DefReg) == ImpDefs.end()) in MergeOpsUpdate()
469 ImpDefs.push_back(DefReg); in MergeOpsUpdate()
483 Pred, PredReg, Scratch, dl, Regs, ImpDefs)) in MergeOpsUpdate()
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 1341 for (const uint16_t *ImpDefs = NewDesc.getImplicitDefs(); in optimizeCompareInstr() local
1342 *ImpDefs; ++ImpDefs) in optimizeCompareInstr()
1343 if (!MI->definesRegister(*ImpDefs)) in optimizeCompareInstr()
1345 MachineOperand::CreateReg(*ImpDefs, true, true)); in optimizeCompareInstr()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 2713 const uint16_t *ImpDefs in canClobberReachingPhysRegUse() local
2716 if(!ImpDefs && !RegMask) in canClobberReachingPhysRegUse()
2731 if (ImpDefs) in canClobberReachingPhysRegUse()
2732 for (const uint16_t *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse()
2751 const uint16_t *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs() local
2752 assert(ImpDefs && "Caller should check hasPhysRegDefs"); in canClobberPhysRegDefs()
2768 unsigned Reg = ImpDefs[i - NumDefs]; in canClobberPhysRegDefs()
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| /freebsd-9-stable/contrib/llvm/patches/ |
| D | patch-r263312-llvm-r169939-inline-asm-with-realign.diff | 272 + const uint16_t *ImpDefs = Desc.getImplicitDefs();
274 + ClobberRegs.push_back(ImpDefs[I]);
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| /freebsd-9-stable/contrib/llvm/lib/MC/MCParser/ |
| D | AsmParser.cpp | 4203 const uint16_t *ImpDefs = Desc.getImplicitDefs(); in parseMSInlineAsm() local
4205 ClobberRegs.push_back(ImpDefs[I]); in parseMSInlineAsm()
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