| /freebsd-9-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 222 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
|
| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 177 case ISD::FDIV: return "fdiv"; in getOperationName()
|
| D | SelectionDAGBuilder.h | 702 void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); } in visitFDiv()
|
| D | LegalizeVectorOps.cpp | 203 case ISD::FDIV: in LegalizeOp()
|
| D | LegalizeFloatTypes.cpp | 73 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break; in SoftenFloatResult()
818 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break; in ExpandFloatResult()
|
| D | LegalizeVectorTypes.cpp | 102 case ISD::FDIV: in ScalarizeVectorResult()
572 case ISD::FDIV: in SplitVectorResult()
1528 case ISD::FDIV: in WidenVectorResult()
|
| D | FastISel.cpp | 999 return SelectBinaryOp(I, ISD::FDIV); in SelectOperator()
|
| D | SelectionDAG.cpp | 2953 case ISD::FDIV: in getNode()
3223 case ISD::FDIV: in getNode()
3261 case ISD::FDIV: in getNode()
3301 case ISD::FDIV: in getNode()
|
| D | DAGCombiner.cpp | 470 case ISD::FDIV: in isNegatibleForFree()
538 case ISD::FDIV: in GetNegatedExpression()
1171 case ISD::FDIV: return visitFDIV(N); in visit()
6430 return DAG.getNode(ISD::FDIV, SDLoc(N), VT, N0, N1); in visitFDIV()
6459 return DAG.getNode(ISD::FDIV, SDLoc(N), VT, in visitFDIV()
10225 N->getOpcode() == ISD::FDIV) { in SimplifyVBinOp()
|
| D | LegalizeDAG.cpp | 3327 case ISD::FDIV: in ExpandNode()
4029 case ISD::FDIV: in PromoteNode()
|
| D | SelectionDAGBuilder.cpp | 4446 Res = DAG.getNode(ISD::FDIV, DL, LHS.getValueType(), in ExpandPowI()
|
| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 828 case ISD::FDIV: in canOpTrap()
1262 case FDiv: return ISD::FDIV; in InstructionOpcodeToISD()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1117 setOperationAction(ISD::FDIV, MVT::f32, Expand); in HexagonTargetLowering()
1120 setOperationAction(ISD::FDIV, MVT::f64, Expand); in HexagonTargetLowering()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 186 setOperationAction(ISD::FDIV, VT, Expand); in AMDGPUTargetLowering()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1597 setOperationAction(ISD::FDIV, MVT::f128, Legal); in SparcTargetLowering()
1622 setOperationAction(ISD::FDIV, MVT::f128, Custom); in SparcTargetLowering()
2825 case ISD::FDIV: return LowerF128Op(Op, DAG, in LowerOperation()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 417 defm FDIV : ADDS_M<"div.d", IIFdivDouble, 0, fdiv>, ADDS_FM<0x03, 17>;
|
| D | MipsSEISelLowering.cpp | 226 setOperationAction(ISD::FDIV, Ty, Legal); in addMSAFloatType()
1704 return DAG.getNode(ISD::FDIV, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
|
| /freebsd-9-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 369 def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
|
| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 395 setOperationAction(ISD::FDIV, VT, Expand); in PPCTargetLowering()
468 setOperationAction(ISD::FDIV, MVT::v4f32, Legal); in PPCTargetLowering()
530 setTargetDAGCombine(ISD::FDIV); in PPCTargetLowering()
7008 case ISD::FDIV: { in PerformDAGCombine()
|
| D | PPCInstrInfo.td | 2117 defm FDIV : AForm_2r<63, 18,
|
| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 229 setOperationAction(ISD::FDIV, MVT::f128, Custom); in AArch64TargetLowering()
2869 case ISD::FDIV: return LowerF128ToCall(Op, DAG, RTLIB::DIV_F128); in LowerOperation()
|
| D | AArch64InstrInfo.td | 2128 // Contains: FMUL, FDIV, FADD, FSUB, FMAX, FMIN, FMAXNM, FMINNM, FNMUL
2165 defm FDIV : A64I_fpdp2sizes<0b0001, "fdiv", fdiv>;
|
| /freebsd-9-stable/contrib/llvm/tools/clang/include/clang/Basic/ |
| D | arm_neon.td | 631 def FDIV : IOpInst<"vdiv", "ddd", "fdQfQd", OP_DIV>;
|
| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 809 setOperationAction(ISD::FDIV, VT, Expand); in resetOperationActions()
919 setOperationAction(ISD::FDIV, MVT::v4f32, Legal); in resetOperationActions()
954 setOperationAction(ISD::FDIV, MVT::v2f64, Legal); in resetOperationActions()
1131 setOperationAction(ISD::FDIV, MVT::v8f32, Legal); in resetOperationActions()
1144 setOperationAction(ISD::FDIV, MVT::v4f64, Legal); in resetOperationActions()
1322 setOperationAction(ISD::FDIV, MVT::v16f32, Legal); in resetOperationActions()
1329 setOperationAction(ISD::FDIV, MVT::v8f64, Legal); in resetOperationActions()
|
| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 147 setOperationAction(ISD::FDIV, VT, Expand); in addTypeForNEON()
482 setOperationAction(ISD::FDIV, MVT::v2f64, Expand); in ARMTargetLowering()
600 setTargetDAGCombine(ISD::FDIV); in ARMTargetLowering()
10168 case ISD::FDIV: return PerformVDIVCombine(N, DCI, Subtarget); in PerformDAGCombine()
|