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Searched refs:msr (Results 1 – 25 of 114) sorted by relevance

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/freebsd-14-stable/sys/x86/cpufreq/
HDhwpstate_amd.c81 #define AMD_10H_11H_GET_PSTATE_MAX_VAL(msr) (((msr) >> 4) & 0x7) argument
82 #define AMD_10H_11H_GET_PSTATE_LIMIT(msr) (((msr)) & 0x7) argument
84 #define AMD_10H_11H_CUR_VID(msr) (((msr) >> 9) & 0x7F) argument
85 #define AMD_10H_11H_CUR_DID(msr) (((msr) >> 6) & 0x07) argument
86 #define AMD_10H_11H_CUR_FID(msr) ((msr) & 0x3F) argument
88 #define AMD_17H_CUR_IDIV(msr) (((msr) >> 30) & 0x03) argument
89 #define AMD_17H_CUR_IDD(msr) (((msr) >> 22) & 0xFF) argument
90 #define AMD_17H_CUR_VID(msr) (((msr) >> 14) & 0xFF) argument
91 #define AMD_17H_CUR_DID(msr) (((msr) >> 8) & 0x3F) argument
92 #define AMD_17H_CUR_FID(msr) ((msr) & 0xFF) argument
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HDp4tcc.c262 uint64_t mask, msr; in p4tcc_set() local
283 msr = rdmsr(MSR_THERM_CONTROL); in p4tcc_set()
285 msr &= ~(mask | TCC_ENABLE_ONDEMAND); in p4tcc_set()
287 msr |= (val << TCC_REG_OFFSET) | TCC_ENABLE_ONDEMAND; in p4tcc_set()
288 wrmsr(MSR_THERM_CONTROL, msr); in p4tcc_set()
297 if (msr & TCC_ENABLE_ONDEMAND) in p4tcc_set()
309 uint64_t msr; in p4tcc_get() local
325 msr = rdmsr(MSR_THERM_CONTROL); in p4tcc_get()
326 val = (msr >> TCC_REG_OFFSET) & (TCC_NUM_SETTINGS - 1); in p4tcc_get()
/freebsd-14-stable/sys/amd64/amd64/
HDinitcpu.c67 uint64_t msr; in init_amd() local
116 msr = rdmsr(MSR_NB_CFG1); in init_amd()
117 msr |= (uint64_t)1 << 54; in init_amd()
118 wrmsr(MSR_NB_CFG1, msr); in init_amd()
130 msr = rdmsr(0xc001102a); in init_amd()
131 msr &= ~((uint64_t)1 << 24); in init_amd()
132 wrmsr(0xc001102a, msr); in init_amd()
144 msr = rdmsr(MSR_LS_CFG); in init_amd()
145 msr |= (uint64_t)1 << 15; in init_amd()
146 wrmsr(MSR_LS_CFG, msr); in init_amd()
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/freebsd-14-stable/usr.sbin/bhyve/
HDuart_emul.c93 uint8_t msr; /* Modem status register (R/W) */ member
110 uint8_t msr; in modem_status() local
117 msr = 0; in modem_status()
119 msr |= MSR_CTS; in modem_status()
121 msr |= MSR_DSR; in modem_status()
123 msr |= MSR_RI; in modem_status()
125 msr |= MSR_DCD; in modem_status()
131 msr = MSR_DCD | MSR_DSR; in modem_status()
133 assert((msr & MSR_DELTA_MASK) == 0); in modem_status()
135 return (msr); in modem_status()
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/freebsd-14-stable/sys/powerpc/powerpc/
HDfpu.c50 register_t msr; in save_fpu_int() local
58 msr = mfmsr(); in save_fpu_int()
60 mtmsr(msr | PSL_FP | PSL_VSX); in save_fpu_int()
62 mtmsr(msr | PSL_FP); in save_fpu_int()
98 mtmsr(msr); in save_fpu_int()
104 register_t msr; in enable_fpu() local
138 msr = mfmsr(); in enable_fpu()
140 mtmsr(msr | PSL_FP | PSL_VSX); in enable_fpu()
142 mtmsr(msr | PSL_FP); in enable_fpu()
179 mtmsr(msr); in enable_fpu()
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HDaltivec.c49 int msr; in save_vec_int() local
57 msr = mfmsr(); in save_vec_int()
58 mtmsr(msr | PSL_VEC); in save_vec_int()
81 mtmsr(msr); in save_vec_int()
88 int msr; in enable_vec() local
119 msr = mfmsr(); in enable_vec()
120 mtmsr(msr | PSL_VEC); in enable_vec()
143 mtmsr(msr); in enable_vec()
184 register_t msr; in disable_vec() local
192 msr = mfmsr() & ~PSL_VEC; in disable_vec()
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HDcpu.c377 register_t msr; in cpu_est_clockrate() local
384 msr = mfmsr(); in cpu_est_clockrate()
385 mtmsr(msr & ~PSL_EE); in cpu_est_clockrate()
405 mtmsr(msr); in cpu_est_clockrate()
423 mtmsr(msr); in cpu_est_clockrate()
756 register_t msr; in cpu_idle_60x() local
764 msr = mfmsr(); in cpu_idle_60x()
779 :: "r"(msr | PSL_POW)); in cpu_idle_60x()
783 mtmsr(msr | PSL_POW); in cpu_idle_60x()
805 register_t msr; in cpu_idle_booke() local
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/freebsd-14-stable/sys/dev/coretemp/
HDcoretemp.c158 uint64_t msr; in coretemp_attach() local
191 msr = rdmsr(MSR_BIOS_SIGN); in coretemp_attach()
192 msr = msr >> 32; in coretemp_attach()
193 if (msr < 0x39) { in coretemp_attach()
214 msr = rdmsr(MSR_IA32_EXT_CONFIG); in coretemp_attach()
215 if (msr & (1 << 30)) in coretemp_attach()
241 ret = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msr); in coretemp_attach()
243 tjtarget = (msr >> 16) & 0xff; in coretemp_attach()
312 u_int msr; member
347 uint64_t msr; in coretemp_get_val_sysctl() local
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/freebsd-14-stable/sys/amd64/vmm/
HDvmm_lapic.c131 x2apic_msr(u_int msr) in x2apic_msr() argument
133 return (msr >= 0x800 && msr <= 0xBFF); in x2apic_msr()
137 x2apic_msr_to_regoff(u_int msr) in x2apic_msr_to_regoff() argument
140 return ((msr - 0x800) << 4); in x2apic_msr_to_regoff()
144 lapic_msr(u_int msr) in lapic_msr() argument
147 return (x2apic_msr(msr) || msr == MSR_APICBASE); in lapic_msr()
151 lapic_rdmsr(struct vcpu *vcpu, u_int msr, uint64_t *rval, bool *retu) in lapic_rdmsr() argument
159 if (msr == MSR_APICBASE) { in lapic_rdmsr()
163 offset = x2apic_msr_to_regoff(msr); in lapic_rdmsr()
171 lapic_wrmsr(struct vcpu *vcpu, u_int msr, uint64_t val, bool *retu) in lapic_wrmsr() argument
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/freebsd-14-stable/sys/x86/x86/
HDx86_mem.c203 int i, j, msr; in x86_mrfetch() local
209 msr = MSR_MTRR64kBase; in x86_mrfetch()
210 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) { in x86_mrfetch()
211 msrv = rdmsr(msr); in x86_mrfetch()
221 msr = MSR_MTRR16kBase; in x86_mrfetch()
222 for (i = 0; i < MTRR_N16K / 8; i++, msr++) { in x86_mrfetch()
223 msrv = rdmsr(msr); in x86_mrfetch()
233 msr = MSR_MTRR4kBase; in x86_mrfetch()
234 for (i = 0; i < MTRR_N4K / 8; i++, msr++) { in x86_mrfetch()
235 msrv = rdmsr(msr); in x86_mrfetch()
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/freebsd-14-stable/sys/arm64/arm64/
HDlocore.S69 msr contextidr_el1, xzr
120 msr sp_el0, x15
189 msr daifset, #DAIF_INTR
195 msr contextidr_el1, xzr
227 msr sp_el0, x15
231 msr ttbr0_el1, x27
245 msr tpidr_el1, x18
264 msr sctlr_el1, x2
275 msr spsr_el1, x2
276 msr elr_el1, lr
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HDswtch.S42 msr mdscr_el1, \tmp
51 msr mdscr_el1, \tmp
89 msr sp_el0, x19
99 msr tpidr_el0, x6
101 msr tpidrro_el0, x6
168 msr sp_el0, x20
191 msr tpidr_el0, x6
193 msr tpidrro_el0, x6
216 msr daifset, #(DAIF_D | DAIF_INTR)
224 msr sp_el0, x18
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HDexception.S80 msr sp_el0, x1
97 msr daifclr, #(DAIF_D | DAIF_A)
104 msr daifclr, #(DAIF_A)
113 msr daifset, #(DAIF_ALL)
132 msr sp_el0, x18
134 msr spsr_el1, x11
135 msr elr_el1, x10
175 msr daifset, #(DAIF_INTR)
185 msr daif, x19
/freebsd-14-stable/sys/dev/hyperv/vmbus/aarch64/
HDhyperv_machdep.h52 void arm_hv_set_vreg(u32 msr, u64 val);
53 #define WRMSR(msr, val) arm_hv_set_vreg(msr, val) argument
54 u64 arm_hv_get_vreg(u32 msr);
55 #define RDMSR(msr) arm_hv_get_vreg(msr) argument
HDhyperv_machdep.c51 arm_hv_set_vreg(u32 msr, u64 value) in arm_hv_set_vreg() argument
56 HV_PARTITION_ID_SELF, HV_VP_INDEX_SELF, msr, 0, value, NULL); in arm_hv_set_vreg()
60 hv_get_vpreg_128(u32 msr, struct hv_get_vp_registers_output *result) in hv_get_vpreg_128() argument
70 args.a4 = msr; in hv_get_vpreg_128()
83 arm_hv_get_vreg(u32 msr) in arm_hv_get_vreg() argument
87 hv_get_vpreg_128(msr, &output); in arm_hv_get_vreg()
/freebsd-14-stable/sys/powerpc/cpufreq/
HDpcr.c108 register_t msr; in write_scom() local
113 msr = mfmsr(); in write_scom()
114 mtmsr(msr & ~PSL_EE); isync(); in write_scom()
127 mtmsr(msr); isync(); in write_scom()
133 register_t msr; in read_scom() local
136 msr = mfmsr(); in read_scom()
137 mtmsr(msr & ~PSL_EE); isync(); in read_scom()
147 mtmsr(msr); isync(); in read_scom()
263 register_t pcr, msr; in pcr_set() local
281 msr = mfmsr(); in pcr_set()
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/freebsd-14-stable/sys/compat/linuxkpi/common/include/asm/
HDmsr.h32 #define rdmsrl(msr, val) ((val) = rdmsr(msr)) argument
33 #define rdmsrl_safe(msr, val) rdmsr_safe(msr, val) argument
/freebsd-14-stable/sys/amd64/vmm/intel/
HDvmx_msr.h64 int msr_bitmap_change_access(char *bitmap, u_int msr, int access);
66 #define guest_msr_rw(vmx, msr) \ argument
67 msr_bitmap_change_access((vmx)->msr_bitmap, (msr), MSR_BITMAP_ACCESS_RW)
69 #define guest_msr_ro(vmx, msr) \ argument
70 msr_bitmap_change_access((vmx)->msr_bitmap, (msr), MSR_BITMAP_ACCESS_READ)
/freebsd-14-stable/sys/dev/hyperv/vmbus/x86/
HDhyperv_machdep.h35 #define WRMSR(msr, val) wrmsr(msr, val) argument
36 #define RDMSR(msr) rdmsr(msr) argument
/freebsd-14-stable/sys/arm/arm/
HDsetstack.S66 msr cpsr_fsxc, r2
70 msr cpsr_fsxc, r3 /* Restore the old mode */
85 msr cpsr_fsxc, r2
89 msr cpsr_fsxc, r3 /* Restore the old mode */
/freebsd-14-stable/sys/powerpc/booke/
HDmp_cpudep.c54 uint32_t msr, csr; in cpudep_ap_bootstrap() local
72 msr = PSL_CM | PSL_ME; in cpudep_ap_bootstrap()
74 msr = PSL_ME; in cpudep_ap_bootstrap()
76 mtmsr(msr); in cpudep_ap_bootstrap()
HDspe.c57 int msr; in save_vec_int() local
65 msr = mfmsr(); in save_vec_int()
66 mtmsr(msr | PSL_VEC); in save_vec_int()
92 mtmsr(msr); in save_vec_int()
99 int msr; in enable_vec() local
130 msr = mfmsr(); in enable_vec()
131 mtmsr(msr | PSL_VEC); in enable_vec()
155 mtmsr(msr); in enable_vec()
482 uint32_t msr; in spe_handle_fpdata() local
493 msr = mfmsr(); in spe_handle_fpdata()
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/freebsd-14-stable/sys/powerpc/include/
HDcpufunc.h235 register_t msr; in intr_disable() local
237 msr = mfmsr(); in intr_disable()
238 mtmsr(msr & ~PSL_EE); in intr_disable()
239 return (msr); in intr_disable()
243 intr_restore(register_t msr) in intr_restore() argument
246 mtmsr(msr); in intr_restore()
/freebsd-14-stable/sys/powerpc/aim/
HDaim_machdep.c163 …kernel(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t, register_t offset, register_t msr);
164 …irtual(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t, register_t offset, register_t msr);
240 register_t msr; in aim_cpu_init() local
305 msr = mfmsr(); in aim_cpu_init()
306 mtmsr((msr & ~(PSL_IR | PSL_DR)) | PSL_RI); in aim_cpu_init()
466 mtmsr(msr); in aim_cpu_init()
647 register_t msr; in flush_disable_caches() local
654 msr = mfmsr(); in flush_disable_caches()
656 mtmsr(msr & ~(PSL_EE | PSL_DR)); in flush_disable_caches()
744 mtmsr(msr); in flush_disable_caches()
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/freebsd-14-stable/sys/i386/i386/
HDinitcpu.c644 uint64_t msr; in initializecpu() local
766 msr = rdmsr(MSR_EFER) | EFER_NXE; in initializecpu()
767 wrmsr(MSR_EFER, msr); in initializecpu()
814 u_int64_t msr; in enable_K5_wt_alloc() local
823 msr = rdmsr(0x83); /* HWCR */ in enable_K5_wt_alloc()
824 wrmsr(0x83, msr & !(0x10)); in enable_K5_wt_alloc()
832 msr = Maxmem / 16; in enable_K5_wt_alloc()
834 msr = 0; in enable_K5_wt_alloc()
835 msr |= AMD_WT_ALLOC_TME | AMD_WT_ALLOC_FRE; in enable_K5_wt_alloc()
842 msr |= AMD_WT_ALLOC_PRE; in enable_K5_wt_alloc()
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