| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| HD | AArch64PostLegalizerCombiner.cpp | 293 m_any_of(m_GICmp(m_Pred(), m_Reg(), m_Reg()), in matchMutateAnyExtToZExt() 294 m_GFCmp(m_Pred(), m_Reg(), m_Reg()))); in matchMutateAnyExtToZExt() 353 m_GOr(m_GAnd(m_Reg(AO1), m_Reg(BVO1)), in matchOrToBSP() 354 m_GAnd(m_Reg(AO2), m_Reg(BVO2))))) in matchOrToBSP() 730 m_OneNonDBGUse(m_GPtrAdd(m_Reg(PtrBaseReg), m_ICst(Offset))))) { in optimizeConsecutiveMemOpAddressing()
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| HD | AArch64PreLegalizerCombiner.cpp | 92 if (!mi_match(LHS, MRI, m_GTrunc(m_Reg(WideReg))) || in matchICmpRedundantTrunc() 644 if (!mi_match(DefOp0->getParent(), MRI, m_GTrunc(m_Reg(Op0Wide))) || in tryToSimplifyUADDO() 645 !mi_match(DefOp1->getParent(), MRI, m_GTrunc(m_Reg(Op1Wide)))) in tryToSimplifyUADDO() 711 if (mi_match(U.getParent(), MRI, m_GZExt(m_Reg(WideReg)))) { in tryToSimplifyUADDO()
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| HD | AArch64InstructionSelector.cpp | 1212 if (mi_match(Reg, MRI, m_Neg(m_Reg(MatchReg)))) { in emitSelect() 1229 if (mi_match(Reg, MRI, m_Not(m_Reg(MatchReg)))) { in emitSelect() 1247 m_any_of(m_GAdd(m_Reg(MatchReg), m_SpecificICst(1)), in emitSelect() 1248 m_GPtrAdd(m_Reg(MatchReg), m_SpecificICst(1))))) { in emitSelect() 2184 if (!mi_match(I.getOperand(2).getReg(), MRI, m_Neg(m_Reg(NegatedReg)))) in convertPtrAddToAdd() 2361 m_OneNonDBGUse(m_GZExt(m_OneNonDBGUse(m_Reg(ZExt)))))) in earlySelect() 2410 m_GOr(m_OneNonDBGUse(m_GShl(m_Reg(ShiftSrc), m_ICst(ShiftImm))), in earlySelect() 2411 m_OneNonDBGUse(m_GAnd(m_Reg(MaskSrc), m_ICst(MaskImm)))))) in earlySelect()
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| HD | AArch64PostLegalizerLowering.cpp | 1058 if (!mi_match(DstReg, MRI, m_GTrunc(m_Reg(SrcReg)))) in matchFormTruncstore()
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| HD | AArch64LegalizerInfo.cpp | 1721 if (mi_match(Root, MRI, m_GPtrAdd(m_Reg(NewBase), m_ICst(NewOffset))) && in matchLDPSTPAddrMode()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUPreLegalizerCombiner.cpp | 152 m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 154 m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16() 160 m_GSMax(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 162 m_GSMin(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16()
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| HD | AMDGPUCombinerHelper.cpp | 279 if (!mi_match(Reg, MRI, m_GFNeg(m_Reg(Reg)))) in applyFoldableFneg() 288 if (mi_match(XReg, MRI, m_GFNeg(m_Reg(XReg)))) in applyFoldableFneg() 290 else if (mi_match(YReg, MRI, m_GFNeg(m_Reg(YReg)))) in applyFoldableFneg()
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| HD | AMDGPUGlobalISelUtils.cpp | 52 if (KnownBits && mi_match(Reg, MRI, m_GOr(m_Reg(Base), m_ICst(Offset))) && in getBaseWithConstantOffset()
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| HD | AMDGPUPostLegalizerCombiner.cpp | 322 bool IsShr = mi_match(SrcReg, MRI, m_GZExt(m_Reg(SrcReg))); in matchCvtF32UByteN() 326 IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN() 327 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()
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| HD | AMDGPURegBankCombiner.cpp | 185 MMMOpc.Min, m_CommutativeBinOp(MMMOpc.Max, m_Reg(Val), m_Cst(K0)), in matchMed() 188 MMMOpc.Max, m_CommutativeBinOp(MMMOpc.Min, m_Reg(Val), m_Cst(K1)), in matchMed()
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| HD | AMDGPUInstructionSelector.cpp | 735 Src0, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc0), m_SpecificICst(16)))); in selectG_BUILD_VECTOR() 738 Src1, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc1), m_SpecificICst(16)))); in selectG_BUILD_VECTOR() 2494 m_GTrunc(m_GLShr(m_Reg(LShlSrc), m_SpecificICst(16))))) { in isExtractHiElt() 3281 if (mi_match(Reg, MRI, m_GZExt(m_Reg(ZExtSrc)))) in matchZeroExtendFromS32() 3941 if (!mi_match(El, MRI, m_GFabs(m_Reg(FabsSrc)))) in selectWMMAModsNegAbs() 4001 if (!mi_match(CV->getSourceReg(i), *MRI, m_GFNeg(m_Reg(FNegSrc)))) in selectWMMAModsF16Neg() 4084 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex8() 4106 if (mi_match(Src, *MRI, m_GLShr(m_Reg(ShiftSrc), m_GCst(ShiftAmt))) && in selectSWMMACIndex16() 4849 m_GPtrAdd(m_Reg(BasePtr), in selectMUBUFScratchOffset()
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| HD | AMDGPURegisterBankInfo.cpp | 1788 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | CombinerHelper.cpp | 1005 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) in matchSextTruncSextLoad() 1269 if (!mi_match(Addr, MRI, m_GPtrAdd(m_Reg(Base), m_Reg(Offset))) || in findPreIndexCandidate() 1987 m_OneNonDBGUse(m_any_of(m_GAdd(m_Reg(X), m_Reg(C1)), in matchCommuteShift() 1988 m_GOr(m_Reg(X), m_Reg(C1)))))) in matchCommuteShift() 2042 if (!mi_match(LHS, MRI, m_GAnyExt(m_Reg(ExtSrc))) && in matchCombineShlOfExtend() 2043 !mi_match(LHS, MRI, m_GZExt(m_Reg(ExtSrc))) && in matchCombineShlOfExtend() 2044 !mi_match(LHS, MRI, m_GSExt(m_Reg(ExtSrc)))) in matchCombineShlOfExtend() 2107 while (mi_match(Reg, MRI, m_GBitcast(m_Reg(Reg)))) in peekThroughBitcast() 2259 if (!mi_match(SrcReg, MRI, m_GZExt(m_Reg(ZExtSrcReg)))) in matchCombineUnmergeZExtToZExt() 2415 m_GPtrToInt(m_all_of(m_SpecificType(DstTy), m_Reg(Reg)))); in matchCombineI2PToP2I() [all …]
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| HD | LoadStoreOpt.cpp | 88 if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(BaseReg), m_Reg(PtrAddRHS)))) { in getPointerInfo() 208 m_GPtrAdd(m_Reg(BaseReg), m_ICst(Offset)))) { in instMayAlias() 654 if (!mi_match(Store.getValueReg(), MRI, m_GTrunc(m_Reg(TruncVal)))) in getTruncStoreByteOffset() 666 m_any_of(m_GLShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt)), in getTruncStoreByteOffset() 667 m_GAShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt))))) { in getTruncStoreByteOffset() 747 m_GPtrAdd(m_Reg(BaseReg), m_ICst(LastOffset)))) { in mergeTruncStore() 792 m_GPtrAdd(m_Reg(NewBaseReg), m_ICst(MemOffset)))) { in mergeTruncStore()
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| /freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| HD | LegalizationArtifactCombiner.h | 72 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineAnyExt() 88 m_all_of(m_MInstr(ExtMI), m_any_of(m_GAnyExt(m_Reg(ExtSrc)), in tryCombineAnyExt() 89 m_GSExt(m_Reg(ExtSrc)), in tryCombineAnyExt() 90 m_GZExt(m_Reg(ExtSrc)))))) { in tryCombineAnyExt() 133 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc))) || in tryCombineZExt() 134 mi_match(SrcReg, MRI, m_GSExt(m_Reg(SextSrc)))) { in tryCombineZExt() 167 if (mi_match(SrcReg, MRI, m_GZExt(m_Reg(ZextSrc)))) { in tryCombineZExt() 206 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineSExt() 232 m_all_of(m_MInstr(ExtMI), m_any_of(m_GZExt(m_Reg(ExtSrc)), in tryCombineSExt() 233 m_GSExt(m_Reg(ExtSrc)))))) { in tryCombineSExt() [all …]
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| HD | MIPatternMatch.h | 270 inline operand_type_match m_Reg() { return operand_type_match(); } in m_Reg() function 369 inline bind_ty<Register> m_Reg(Register &R) { return R; }
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| HD | RISCVInstructionSelector.cpp | 174 if (mi_match(ShAmtReg, MRI, m_GZExt(m_Reg(ZExtSrcReg)))) { in selectShiftMask() 194 if (mi_match(ShAmtReg, MRI, m_GAnd(m_Reg(AndSrcReg), m_ICst(AndMask)))) { in selectShiftMask() 209 if (mi_match(ShAmtReg, MRI, m_GAdd(m_Reg(Reg), m_ICst(Imm)))) { in selectShiftMask() 214 } else if (mi_match(ShAmtReg, MRI, m_GSub(m_ICst(Imm), m_Reg(Reg)))) { in selectShiftMask() 259 m_GAnd(m_GShl(m_Reg(RegY), m_ICst(C2)), m_ICst(Mask)))) in selectSHXADDOp() 263 m_GAnd(m_GLShr(m_Reg(RegY), m_ICst(C2)), m_ICst(Mask)))) in selectSHXADDOp() 305 m_GShl(m_OneNonDBGUse(m_GAnd(m_Reg(RegY), m_ICst(Mask))), in selectSHXADDOp() 310 m_GLShr(m_OneNonDBGUse(m_GAnd(m_Reg(RegY), m_ICst(Mask))), in selectSHXADDOp() 360 m_OneNonDBGUse(m_GAnd(m_OneNonDBGUse(m_GShl(m_Reg(RegX), m_ICst(C2))), in selectSHXADD_UWOp() 449 if (!mi_match(CondReg, MRI, m_GICmp(m_Pred(Pred), m_Reg(LHS), m_Reg(RHS)))) { in getOperandsForBranch()
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