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/freebsd-14-stable/sys/contrib/dev/rtw88/
HDcoex.h330 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_set_init() local
332 chip->ops->coex_set_init(rtwdev); in rtw_coex_set_init()
338 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_set_ant_switch() local
340 if (!chip->ops->coex_set_ant_switch) in rtw_coex_set_ant_switch()
343 chip->ops->coex_set_ant_switch(rtwdev, ctrl_type, pos_type); in rtw_coex_set_ant_switch()
348 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_set_gnt_fix() local
350 chip->ops->coex_set_gnt_fix(rtwdev); in rtw_coex_set_gnt_fix()
355 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_set_gnt_debug() local
357 chip->ops->coex_set_gnt_debug(rtwdev); in rtw_coex_set_gnt_debug()
362 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_set_rfe_type() local
[all …]
HDcoex.c16 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_next_rssi_state() local
17 u8 tol = chip->rssi_tolerance; in rtw_coex_next_rssi_state()
39 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_limited_tx() local
44 if (!chip->scbd_support) in rtw_coex_limited_tx()
368 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_write_scbd() local
373 if (!chip->scbd_support) in rtw_coex_write_scbd()
381 if (!chip->new_scbd10_def && (bitpos & COEX_SCBD_FIX2M)) { in rtw_coex_write_scbd()
403 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_read_scbd() local
405 if (!chip->scbd_support) in rtw_coex_read_scbd()
413 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_coex_check_rfk() local
[all …]
HDphy.c129 const struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th; in rtw_phy_set_edcca_th()
144 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_phy_adaptivity_set_mode() local
157 dm_info->l2h_th_ini = chip->l2h_th_ini_ad; in rtw_phy_adaptivity_set_mode()
161 dm_info->l2h_th_ini = chip->l2h_th_ini_cs; in rtw_phy_adaptivity_set_mode()
171 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_phy_adaptivity_init() local
174 if (chip->ops->adaptivity_init) in rtw_phy_adaptivity_init()
175 chip->ops->adaptivity_init(rtwdev); in rtw_phy_adaptivity_init()
180 if (rtwdev->chip->ops->adaptivity) in rtw_phy_adaptivity()
181 rtwdev->chip->ops->adaptivity(rtwdev); in rtw_phy_adaptivity()
186 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_phy_cfo_init() local
[all …]
HDmac.c169 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
173 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
274 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_mac_power_switch() local
310 pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq; in rtw_mac_power_switch()
314 if (chip->id == RTW_CHIP_TYPE_8822C || in rtw_mac_power_switch()
315 chip->id == RTW_CHIP_TYPE_8822B || in rtw_mac_power_switch()
316 chip->id == RTW_CHIP_TYPE_8821C) in rtw_mac_power_switch()
331 u8 sys_func_en = rtwdev->chip->sys_func_en; in __rtw_mac_init_system_cfg()
648 const struct rtw_chip_info *chip = rtwdev->chip; in download_firmware_to_mem() local
649 u32 desc_size = chip->tx_pkt_desc_sz; in download_firmware_to_mem()
[all …]
HDrtw88xxa.c137 if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_usb_type()
142 if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_usb_type()
202 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_read_efuse() local
207 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_read_efuse()
212 log_map, chip->log_efuse_size, true); in rtw88xxa_read_efuse()
224 if (chip->id == RTW_CHIP_TYPE_8812A) { in rtw88xxa_read_efuse()
243 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_efuse()
262 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_efuse()
280 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_reset_8051() local
285 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_reset_8051()
[all …]
HDmain.c437 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_fwcd_prep() local
439 const struct rtw_fwcd_segs *segs = chip->fwcd_segs; in rtw_fwcd_prep()
440 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); in rtw_fwcd_prep()
516 u32 size = rtwdev->chip->fw_rxff_size; in rtw_fw_dump_crash_log()
547 u32 rxff = rtwdev->chip->fw_rxff_size; in rtw_dump_fw()
896 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_set_channel() local
916 chip->ops->set_channel(rtwdev, center_chan, bandwidth, in rtw_set_channel()
940 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_chip_prepare_tx() local
944 chip->ops->phy_calibration(rtwdev); in rtw_chip_prepare_tx()
1009 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_hw_config_rf_ant_num() local
[all …]
HDusb.c97 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C || in rtw_usb_read()
98 rtwdev->chip->id == RTW_CHIP_TYPE_8822B || in rtw_usb_read()
99 rtwdev->chip->id == RTW_CHIP_TYPE_8821C) in rtw_usb_read()
147 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C || in rtw_usb_write()
148 rtwdev->chip->id == RTW_CHIP_TYPE_8822B || in rtw_usb_write()
149 rtwdev->chip->id == RTW_CHIP_TYPE_8821C) in rtw_usb_write()
194 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_usb_parse() local
239 rqpn = &chip->rqpn_table[num_out_pipes]; in rtw_usb_parse()
282 skb_pull(skb, rtwdev->chip->tx_pkt_desc_sz); in rtw_usb_write_port_tx_complete()
390 agg_num < rtwdev->chip->usb_tx_agg_desc_num) in rtw_usb_tx_agg_skb()
[all …]
/freebsd-14-stable/sys/dev/wbwd/
HDwbwd.c101 enum chips chip; member
127 enum chips chip; member
132 .chip = w83627hf,
137 .chip = w83627s,
142 .chip = w83697hf,
147 .chip = w83697ug,
152 .chip = w83637hf,
157 .chip = w83627thf,
162 .chip = w83687thf,
167 .chip = w83627ehf,
[all …]
/freebsd-14-stable/sys/dev/ata/chipsets/
HData-acerlabs.c93 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_ali_probe()
112 switch (ctlr->chip->cfg2) { in ata_ali_chipinit()
114 ctlr->channels = ctlr->chip->cfg1; in ata_ali_chipinit()
143 if (ctlr->chip->chiprev < 0xc7) in ata_ali_chipinit()
149 (ctlr->chip->chiprev >= 0xc7 ? 0x03 : 0x01), 1); in ata_ali_chipinit()
152 if (ctlr->chip->chiprev <= 0xc4) in ata_ali_chipinit()
178 if (ctlr->chip->cfg2 == ALI_SATA) { in ata_ali_chipdeinit()
202 if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) in ata_ali_ch_attach()
205 if (ctlr->chip->chiprev <= 0xc4) { in ata_ali_ch_attach()
210 if (ctlr->chip->cfg2 & ALI_NEW) in ata_ali_ch_attach()
[all …]
HData-siliconimage.c95 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_sii_probe()
111 switch (ctlr->chip->cfg1) { in ata_sii_chipinit()
117 if (ctlr->chip->chipid != ATA_SII0680 || in ata_sii_chipinit()
122 if (ctlr->chip->cfg2 & SII_SETCLK) { in ata_sii_chipinit()
128 ctlr->chip->text); in ata_sii_chipinit()
132 if (ctlr->chip->cfg2 & SII_4CH) { in ata_sii_chipinit()
149 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_sii_chipinit()
185 if (ctlr->chip->cfg2 & SII_INTR) in ata_cmd_ch_attach()
224 mode = min(mode, ctlr->chip->max_dma); in ata_cmd_setmode()
266 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_sii_ch_attach()
[all …]
HData-promise.c208 ctlr->chip = idx; in ata_promise_probe()
222 switch (ctlr->chip->cfg1) { in ata_promise_chipinit()
255 if (ctlr->chip->cfg2 == PR_SX4X) { in ata_promise_chipinit()
304 switch (ctlr->chip->cfg2) { in ata_promise_chipinit()
336 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2)) in ata_promise_chipinit()
365 if (ctlr->chip->cfg1 == PR_NEW) { in ata_promise_ch_attach()
468 mode = min(mode, ctlr->chip->max_dma); in ata_promise_setmode()
470 switch (ctlr->chip->cfg1) { in ata_promise_setmode()
493 (ctlr->chip->cfg2 & PR_SX4X ? 0x000c0260 : 0x0260) + in ata_promise_setmode()
501 if (ctlr->chip->cfg1 < PR_TX) in ata_promise_setmode()
[all …]
/freebsd-14-stable/sys/contrib/device-tree/Bindings/mtd/
HDfsl-upm-nand.txt5 - reg : should specify localbus chip select and size used for the chip.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
24 Each flash chip described may optionally contain additional sub-nodes
55 /* Multi-chip NAND device */
/freebsd-14-stable/contrib/ofed/libcxgb4/
HDt4_chip_type.h70 static inline int is_t4(enum chip_type chip) in is_t4() argument
72 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4); in is_t4()
75 static inline int is_t5(enum chip_type chip) in is_t5() argument
77 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5); in is_t5()
80 static inline int is_t6(enum chip_type chip) in is_t6() argument
82 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6); in is_t6()
/freebsd-14-stable/sys/contrib/device-tree/Bindings/display/mediatek/
Dmediatek,disp.txt29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc)
32 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
33 "mediatek,<chip>-disp-wdma" - write DMA
34 "mediatek,<chip>-disp-ccorr" - color correction
35 "mediatek,<chip>-disp-color" - color processor
36 "mediatek,<chip>-disp-dither" - dither
37 "mediatek,<chip>-disp-aal" - adaptive ambient light controller
38 "mediatek,<chip>-disp-gamma" - gamma correction
[all …]
/freebsd-14-stable/sys/contrib/device-tree/Bindings/input/touchscreen/
HDpixcir_i2c_ts.txt5 - reg: I2C address of the chip
6 - interrupts: interrupt to which the chip is connected
7 - attb-gpio: GPIO connected to the ATTB line of the chip
12 - reset-gpios: GPIO connected to the RESET line of the chip
13 - enable-gpios: GPIO connected to the ENABLE line of the chip
14 - wake-gpios: GPIO connected to the WAKE line of the chip
/freebsd-14-stable/sys/contrib/device-tree/Bindings/net/nfc/
HDnfcmrvl.txt12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
15 Optional UART-based chip specific properties:
16 - flow-control: Specifies that the chip is using RTS/CTS.
17 - break-control: Specifies that the chip needs specific break management.
19 Optional I2C-based chip specific properties:
20 - i2c-int-falling: Specifies that the chip read event shall be trigged on
22 - i2c-int-rising: Specifies that the chip read event shall be trigged on
/freebsd-14-stable/sys/contrib/dev/rtw89/
HDefuse.c51 if (rtwdev->chip->chip_id != RTL8852A) in rtw89_switch_efuse_bank()
80 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_enable_efuse_pwr_cut_ddv()
99 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_disable_efuse_pwr_cut_ddv()
226 u32 physical_size = rtwdev->chip->physical_efuse_size; in rtw89_dump_logical_efuse_map()
227 u32 logical_size = rtwdev->chip->logical_efuse_size; in rtw89_dump_logical_efuse_map()
228 u8 sec_ctrl_size = rtwdev->chip->sec_ctrl_efuse_size; in rtw89_dump_logical_efuse_map()
268 u32 phy_size = rtwdev->chip->physical_efuse_size; in rtw89_parse_efuse_map_ax()
269 u32 log_size = rtwdev->chip->logical_efuse_size; in rtw89_parse_efuse_map_ax()
270 u32 dav_phy_size = rtwdev->chip->dav_phy_efuse_size; in rtw89_parse_efuse_map_ax()
271 u32 dav_log_size = rtwdev->chip->dav_log_efuse_size; in rtw89_parse_efuse_map_ax()
[all …]
HDefuse_be.c25 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_enable_efuse_pwr_cut_ddv_be() local
29 if (chip->chip_id == RTL8922A && hal->cv == CHIP_CAV) in rtw89_enable_efuse_pwr_cut_ddv_be()
46 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_disable_efuse_pwr_cut_ddv_be() local
50 if (chip->chip_id == RTL8922A && hal->cv == CHIP_CAV) in rtw89_disable_efuse_pwr_cut_ddv_be()
219 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_eeprom_parser_be() local
238 phy_idx = chip->sec_ctrl_efuse_size; in rtw89_eeprom_parser_be()
310 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_parse_logical_efuse_block_be() local
315 efuse_block = &chip->efuse_blocks[block]; in rtw89_parse_logical_efuse_block_be()
329 ret = rtwdev->chip->ops->read_efuse(rtwdev, log_map, block); in rtw89_parse_logical_efuse_block_be()
343 u32 phy_size = rtwdev->chip->physical_efuse_size; in rtw89_parse_efuse_map_be()
[all …]
HDmac.c43 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_write()
53 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_read()
305 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dump_l0_to_l1()
323 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_dump_dmac_err_status() local
343 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
360 if (chip->chip_id == RTL8852C) in rtw89_mac_dump_dmac_err_status()
369 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
401 } else if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
452 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
477 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
[all …]
HDphy.h548 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write8()
556 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write16()
564 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write32()
572 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write32_set()
580 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write32_clr()
588 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_write32_mask()
595 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_read8()
602 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_read16()
609 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_read32()
617 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_read32_mask()
[all …]
HDmac.h1050 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_reg_by_idx()
1161 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_check_mac_en()
1196 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_chip_enable_bb_rf() local
1198 return chip->ops->enable_bb_rf(rtwdev); in rtw89_chip_enable_bb_rf()
1203 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_chip_disable_bb_rf() local
1205 return chip->ops->disable_bb_rf(rtwdev); in rtw89_chip_disable_bb_rf()
1212 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_chip_reset_bb_rf()
1246 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_cfg_phy_rpt()
1266 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_cfg_ppdu_status()
1301 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_cfg_plt()
[all …]
/freebsd-14-stable/sys/contrib/device-tree/Bindings/power/reset/
HDocelot-reset.txt11 - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
12 "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
16 compatible = "mscc,ocelot-chip-reset";
HDltc2952-poweroff.txt3 This chip is used to externally trigger a system shut down. Once the trigger has
4 been sent, the chip's watchdog has to be reset to gracefully shut down.
11 chip's watchdog line
13 chip's kill line
17 chip's trigger line. If this property is not set, the
18 trigger function is ignored and the chip is kept alive
/freebsd-14-stable/sys/contrib/device-tree/Bindings/mips/cavium/
HDbootbus.txt3 The Octeon Boot Bus is a configurable parallel bus with 8 chip
4 selects. Each chip select is independently configurable.
13 - #address-cells: Must be <2>. The first cell is the chip select
14 within the bootbus. The second cell is the offset from the chip select.
19 parent-bus-address, length) for each active chip select. If the
20 length element for any triplet is zero, the chip select is disabled,
23 The configuration parameters for each chip select are stored in child
29 - cavium,cs-index: A single cell indicating the chip select that
60 the bus for this chip select.
72 /* The chip select number and offset */
[all …]
/freebsd-14-stable/sys/contrib/device-tree/Bindings/spi/
HDspi-sprd-adi.txt4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
19 the analog chip address where user want to access by hardware components.
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
36 - #address-cells: Number of cells required to define a chip select address
38 - #size-cells: Size of cells required to define a chip select address size
48 value specifies the analog chip address where user want to access

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