Searched refs:VecEltVT (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | DAGCombiner.cpp | 22285 EVT VecEltVT = InVecVT.getVectorElementType(); in scalarizeExtractedVectorLoad() local 22290 if (!VecEltVT.isByteSized()) in scalarizeExtractedVectorLoad() 22294 ResultVT.bitsGT(VecEltVT) ? ISD::NON_EXTLOAD : ISD::EXTLOAD; in scalarizeExtractedVectorLoad() 22295 if (!TLI.isOperationLegalOrCustom(ISD::LOAD, VecEltVT) || in scalarizeExtractedVectorLoad() 22296 !TLI.shouldReduceLoadWidth(OriginalLoad, ExtTy, VecEltVT)) in scalarizeExtractedVectorLoad() 22304 unsigned PtrOff = VecEltVT.getSizeInBits() * Elt / 8; in scalarizeExtractedVectorLoad() 22311 Alignment = commonAlignment(Alignment, VecEltVT.getSizeInBits() / 8); in scalarizeExtractedVectorLoad() 22315 if (!TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VecEltVT, in scalarizeExtractedVectorLoad() 22328 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad() 22332 TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, VecEltVT) ? ISD::ZEXTLOAD in scalarizeExtractedVectorLoad() [all …]
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| HD | SelectionDAG.cpp | 12003 EVT VecEltVT = N->getValueType(0).getVectorElementType(); in isConstOrConstSplat() local 12006 assert(CVT.bitsGE(VecEltVT) && "Illegal splat_vector element extension"); in isConstOrConstSplat() 12007 if (AllowTruncation || CVT == VecEltVT) in isConstOrConstSplat()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | SIISelLowering.cpp | 13378 EVT VecEltVT = VecVT.getVectorElementType(); in performExtractVectorEltCombine() local 13382 unsigned VecEltSize = VecEltVT.getSizeInBits(); in performExtractVectorEltCombine() 13398 if (Vec.hasOneUse() && DCI.isBeforeLegalize() && VecEltVT == ResVT) { in performExtractVectorEltCombine() 13456 if (isa<MemSDNode>(Vec) && VecEltSize <= 16 && VecEltVT.isByteSized() && in performExtractVectorEltCombine() 13475 EVT VecEltAsIntVT = VecEltVT.changeTypeToInteger(); in performExtractVectorEltCombine() 13479 if (VecEltVT == ResVT) { in performExtractVectorEltCombine() 13480 return DAG.getNode(ISD::BITCAST, SL, VecEltVT, Trunc); in performExtractVectorEltCombine()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVISelLowering.cpp | 9855 MVT VecEltVT = VecVT.getVectorElementType(); in lowerVECREDUCE() local 9866 SDValue StartV = DAG.getNeutralElement(BaseOpc, DL, VecEltVT, SDNodeFlags()); in lowerVECREDUCE() 9874 StartV = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VecEltVT, Vec, in lowerVECREDUCE() 9921 MVT VecEltVT = Op.getSimpleValueType(); in lowerFPVECREDUCE() local 9926 getRVVFPReductionOpAndOperands(Op, DAG, VecEltVT, Subtarget); in lowerFPVECREDUCE()
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