Searched refs:Src2Regs (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| HD | LegalizerHelper.h | 251 ArrayRef<Register> Src2Regs, LLT NarrowTy);
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | LegalizerHelper.cpp | 5811 ArrayRef<Register> Src2Regs, in multiplyRegisters() argument
5819 B.buildMul(NarrowTy, Src1Regs[DstIdx], Src2Regs[DstIdx]).getReg(0); in multiplyRegisters()
5830 B.buildMul(NarrowTy, Src1Regs[DstIdx - i], Src2Regs[i]); in multiplyRegisters()
5837 B.buildUMulH(NarrowTy, Src1Regs[DstIdx - 1 - i], Src2Regs[i]); in multiplyRegisters()
5925 SmallVector<Register, 2> Src1Regs, Src2Regs, Src1Left, Src2Left, DstRegs; in narrowScalarAddSub() local
5928 extractParts(Src2, RegTy, NarrowTy, DummyTy, Src2Regs, Src2Left, MIRBuilder, in narrowScalarAddSub()
5934 Src2Regs.push_back(Src2Left[I]); in narrowScalarAddSub()
5948 {Src1Regs[i], Src2Regs[i]}); in narrowScalarAddSub()
5951 {Src1Regs[i], Src2Regs[i], CarryIn}); in narrowScalarAddSub()
5954 {Src1Regs[i], Src2Regs[i], CarryIn}); in narrowScalarAddSub()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPURegisterBankInfo.cpp | 2335 SmallVector<Register, 2> Src2Regs(OpdMapper.getVRegs(3)); in applyMappingImpl() local
2339 assert(Src1Regs.empty() && Src2Regs.empty()); in applyMappingImpl()
2349 if (Src2Regs.empty()) in applyMappingImpl()
2350 split64BitValueForMapping(B, Src2Regs, HalfTy, MI.getOperand(3).getReg()); in applyMappingImpl()
2352 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
2356 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0]); in applyMappingImpl()
2357 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1]); in applyMappingImpl()
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