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Searched refs:REG_RSV_CTRL (Results 1 – 6 of 6) sorted by relevance

/freebsd-14-stable/sys/contrib/dev/rtw88/
HDrtw88xxa.c284 rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1)); in rtw88xxa_reset_8051()
286 rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(3)); in rtw88xxa_reset_8051()
288 rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(0)); in rtw88xxa_reset_8051()
294 rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1)); in rtw88xxa_reset_8051()
296 rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(3)); in rtw88xxa_reset_8051()
298 rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(0)); in rtw88xxa_reset_8051()
1157 rtw_write8_set(rtwdev, REG_RSV_CTRL, BIT(5) | BIT(6)); in rtw88xxa_power_on()
HDwow.c445 rtw_write8(rtwdev, REG_RSV_CTRL, BIT_WLOCK_1C_B6); in rtw_wow_avoid_reset_mac()
446 rtw_write8(rtwdev, REG_RSV_CTRL, in rtw_wow_avoid_reset_mac()
HDmac.c68 rtw_write8(rtwdev, REG_RSV_CTRL, 0); in rtw_mac_pre_system_cfg()
443 rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT_WLMCU_IOIF); in wlan_cpu_enable()
452 rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT_WLMCU_IOIF); in wlan_cpu_enable()
HDrtw8703b.c181 {REG_RSV_CTRL,
399 {REG_RSV_CTRL + 1,
404 {REG_RSV_CTRL + 1,
HDreg.h32 #define REG_RSV_CTRL 0x001C macro
HDrtw8822c.c1471 static const u32 set_pi[2] = {REG_RSV_CTRL, REG_WLRF1}; in rtw8822c_txgapk_read_offset()