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Searched refs:OPERAND_REG_IMM_INT32 (Results 1 – 9 of 9) sorted by relevance

/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIDefines.h200 OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET, enumerator
256 OPERAND_REG_IMM_FIRST = OPERAND_REG_IMM_INT32,
265 OPERAND_SRC_FIRST = OPERAND_REG_IMM_INT32,
HDSIRegisterInfo.td1137 def SSrc_b32 : SrcRegOrImm9 <SReg_32, "OPW32", "OPERAND_REG_IMM_INT32", 32, OperandSemantics.INT>;
1141 def SSrcOrLds_b32 : SrcRegOrImm9 <SRegOrLds_32, "OPW32", "OPERAND_REG_IMM_INT32", 32, OperandSemant…
1207 def VSrc_b32 : SrcRegOrImm9 <VS_32, "OPW32", "OPERAND_REG_IMM_INT32", 32, OperandSemantics.INT>;
HDSIInstrInfo.h1091 AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32; in isInlineConstant()
HDSIInstrInfo.td967 let OperandType = "OPERAND_REG_IMM_INT32";
HDSIInstrInfo.cpp4242 case AMDGPU::OPERAND_REG_IMM_INT32: in isInlineConstant()
4686 case AMDGPU::OPERAND_REG_IMM_INT32: in verifyInstruction()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
HDAMDGPUMCCodeEmitter.cpp274 case AMDGPU::OPERAND_REG_IMM_INT32: in getLitEncoding()
HDAMDGPUInstPrinter.cpp821 case AMDGPU::OPERAND_REG_IMM_INT32: in printRegularOperand()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
HDAMDGPUBaseInfo.h1357 case AMDGPU::OPERAND_REG_IMM_INT32: in getOperandSize()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
HDAMDGPUAsmParser.cpp1924 case AMDGPU::OPERAND_REG_IMM_INT32: in getOpFltSemantics()
2292 case AMDGPU::OPERAND_REG_IMM_INT32: in addLiteralImmOperand()
2346 case AMDGPU::OPERAND_REG_IMM_INT32: in addLiteralImmOperand()