| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineAndOrXor.cpp | 2242 Value *NewOp1 = in foldBitwiseLogicWithIntrinsics() local
2245 return CallInst::Create(F, {NewOp0, NewOp1, X->getOperand(2)}); in foldBitwiseLogicWithIntrinsics()
2287 Value *NewOp1 = simplifyAndOrWithOpReplaced(I->getOperand(1), Op, RepOp, in simplifyAndOrWithOpReplaced() local
2289 if (!NewOp0 && !NewOp1) in simplifyAndOrWithOpReplaced()
2294 if (!NewOp1) in simplifyAndOrWithOpReplaced()
2295 NewOp1 = I->getOperand(1); in simplifyAndOrWithOpReplaced()
2297 if (Value *Res = simplifyBinOp(I->getOpcode(), NewOp0, NewOp1, in simplifyAndOrWithOpReplaced()
2303 return IC.Builder.CreateBinOp(I->getOpcode(), NewOp0, NewOp1); in simplifyAndOrWithOpReplaced()
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| HD | InstCombineCompares.cpp | 6025 Value *NewOp1 = nullptr; in foldICmpWithCastOp() local
6029 NewOp1 = PtrToIntOp1->getOperand(0); in foldICmpWithCastOp()
6031 NewOp1 = ConstantExpr::getIntToPtr(RHSC, SrcTy); in foldICmpWithCastOp()
6034 if (NewOp1) in foldICmpWithCastOp()
6035 return new ICmpInst(ICmp.getPredicate(), Op0Src, NewOp1); in foldICmpWithCastOp()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVISelLowering.cpp | 9129 SDValue NewOp1 = in LowerINTRINSIC_WO_CHAIN() local
9132 DAG.getNode(Opc, DL, MVT::i64, NewOp0, NewOp1, Op.getOperand(3)); in LowerINTRINSIC_WO_CHAIN()
9162 SDValue NewOp1 = in LowerINTRINSIC_WO_CHAIN() local
9165 RISCVISD::MOPRR, DL, MVT::i64, NewOp0, NewOp1, in LowerINTRINSIC_WO_CHAIN()
9176 SDValue NewOp1 = in LowerINTRINSIC_WO_CHAIN() local
9178 SDValue Res = DAG.getNode(RISCVISD::CLMUL, DL, MVT::i64, NewOp0, NewOp1); in LowerINTRINSIC_WO_CHAIN()
9190 SDValue NewOp1 = in LowerINTRINSIC_WO_CHAIN() local
9194 NewOp1 = DAG.getNode(ISD::SHL, DL, MVT::i64, NewOp1, in LowerINTRINSIC_WO_CHAIN()
9196 SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp0, NewOp1); in LowerINTRINSIC_WO_CHAIN()
12169 SDValue NewOp1 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOp() local
[all …]
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| HD | LoongArchISelLowering.cpp | 2663 SDValue NewOp1 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOp() local
2666 NewOp1 = DAG.getNode(ISD::SUB, DL, MVT::i64, TmpOp, NewOp1); in customLegalizeToWOp()
2668 NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOp()
2684 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOpWithSExt() local
2685 SDValue NewWOp = DAG.getNode(N->getOpcode(), DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOpWithSExt()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | DAGCombiner.cpp | 9826 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitRotate() local
9827 return DAG.getNode(N->getOpcode(), dl, VT, N0, NewOp1); in visitRotate()
9911 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSHL() local
9912 return DAG.getNode(ISD::SHL, DL, VT, N0, NewOp1); in visitSHL()
10466 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSRA() local
10467 return DAG.getNode(ISD::SRA, DL, VT, N0, NewOp1); in visitSRA()
10712 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSRL() local
10713 return DAG.getNode(ISD::SRL, DL, VT, N0, NewOp1); in visitSRL()
18648 SDValue NewOp1 = DAG.getConstant(CNV, DL, CN->getValueType(0)); in CombineToPreIndexedLoadStore() local
18653 OtherUses[i]->getValueType(0), NewOp1, NewOp2); in CombineToPreIndexedLoadStore()
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| HD | TargetLowering.cpp | 3093 SDValue NewOp1 = SimplifyMultipleUseDemandedVectorElts(Op1, DemandedElts, in SimplifyDemandedVectorElts() local
3095 if (NewOp0 || NewOp1) { in SimplifyDemandedVectorElts()
3098 NewOp1 ? NewOp1 : Op1, Op->getFlags()); in SimplifyDemandedVectorElts()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | LegalizerHelper.cpp | 8514 auto NewOp1 = MIRBuilder.buildAnd(MaskTy, Op1Reg, MaskReg); in lowerSelect() local
8517 auto Or = MIRBuilder.buildOr(DstTy, NewOp1, NewOp2); in lowerSelect()
8520 MIRBuilder.buildOr(DstReg, NewOp1, NewOp2); in lowerSelect()
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