| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineAndOrXor.cpp | 2240 Value *NewOp0 = in foldBitwiseLogicWithIntrinsics() local
2245 return CallInst::Create(F, {NewOp0, NewOp1, X->getOperand(2)}); in foldBitwiseLogicWithIntrinsics()
2249 Value *NewOp0 = Builder.CreateBinOp( in foldBitwiseLogicWithIntrinsics() local
2256 return CallInst::Create(F, {NewOp0}); in foldBitwiseLogicWithIntrinsics()
2285 Value *NewOp0 = simplifyAndOrWithOpReplaced(I->getOperand(0), Op, RepOp, in simplifyAndOrWithOpReplaced() local
2289 if (!NewOp0 && !NewOp1) in simplifyAndOrWithOpReplaced()
2292 if (!NewOp0) in simplifyAndOrWithOpReplaced()
2293 NewOp0 = I->getOperand(0); in simplifyAndOrWithOpReplaced()
2297 if (Value *Res = simplifyBinOp(I->getOpcode(), NewOp0, NewOp1, in simplifyAndOrWithOpReplaced()
2303 return IC.Builder.CreateBinOp(I->getOpcode(), NewOp0, NewOp1); in simplifyAndOrWithOpReplaced()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVISelLowering.cpp | 6304 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, XLenVT, Op0); in LowerOperation() local
6305 SDValue FPConv = DAG.getNode(RISCVISD::FMV_H_X, DL, MVT::f16, NewOp0); in LowerOperation()
6310 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, XLenVT, Op0); in LowerOperation() local
6311 SDValue FPConv = DAG.getNode(RISCVISD::FMV_H_X, DL, MVT::bf16, NewOp0); in LowerOperation()
6316 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op0); in LowerOperation() local
6318 DAG.getNode(RISCVISD::FMV_W_X_RV64, DL, MVT::f32, NewOp0); in LowerOperation()
9127 SDValue NewOp0 = in LowerINTRINSIC_WO_CHAIN() local
9132 DAG.getNode(Opc, DL, MVT::i64, NewOp0, NewOp1, Op.getOperand(3)); in LowerINTRINSIC_WO_CHAIN()
9160 SDValue NewOp0 = in LowerINTRINSIC_WO_CHAIN() local
9165 RISCVISD::MOPRR, DL, MVT::i64, NewOp0, NewOp1, in LowerINTRINSIC_WO_CHAIN()
[all …]
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| HD | LoongArchISelLowering.cpp | 1647 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op0); in lowerBITCAST() local
1648 return DAG.getNode(LoongArchISD::MOVGR2FR_W_LA64, DL, MVT::f32, NewOp0); in lowerBITCAST()
2651 SDValue NewOp0, NewRes; in customLegalizeToWOp() local
2657 NewOp0 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(0)); in customLegalizeToWOp()
2658 NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0); in customLegalizeToWOp()
2662 NewOp0 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(0)); in customLegalizeToWOp()
2668 NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOp()
2683 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0)); in customLegalizeToWOpWithSExt() local
2685 SDValue NewWOp = DAG.getNode(N->getOpcode(), DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOpWithSExt()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 3091 SDValue NewOp0 = SimplifyMultipleUseDemandedVectorElts(Op0, DemandedElts, in SimplifyDemandedVectorElts() local
3095 if (NewOp0 || NewOp1) { in SimplifyDemandedVectorElts()
3097 TLO.DAG.getNode(Opcode, SDLoc(Op), VT, NewOp0 ? NewOp0 : Op0, in SimplifyDemandedVectorElts()
|