Home
last modified time | relevance | path

Searched refs:EOR (Results 1 – 25 of 41) sorted by relevance

12

/freebsd-14-stable/contrib/tcsh/
HDtermcap.vms28 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\
48 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\
/freebsd-14-stable/crypto/heimdal/appl/telnet/arpa/
HDtelnet.h58 #define EOR 239 /* end of record (transparent mode) */ macro
/freebsd-14-stable/include/arpa/
HDtelnet.h56 #define EOR 239 /* end of record (transparent mode) */ macro
/freebsd-14-stable/contrib/telnet/arpa/
HDtelnet.h55 #define EOR 239 /* end of record (transparent mode) */ macro
/freebsd-14-stable/contrib/netbsd-tests/lib/libcurses/
HDatf.terminfo23 kf29=\E[15;5~, kf3=\EOR, kf30=\E[17;5~, kf31=\E[18;5~,
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64SchedA510.td435 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "(AND|EOR|NOT|ORN)v8i8",
437 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "(AND|EOR|NOT|ORN)v16i8",
598 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP")>;
862 (instregex "^(AND|EOR|ORR)_ZI",
863 "^(AND|BIC|EOR|EOR|ORR)_ZZZ",
864 "^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]",
865 "^(AND|BIC|EOR|NOT|ORR)_ZPZZ_[BHSD]")>;
868 (instregex "^EOR(BT|TB)_ZZZ_[BHSD]")>;
HDAArch64SchedTSV110.td370 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "(ADD|AND|EOR|ORR|SUB)[WX]r(r|i)")>;
371 def : InstRW<[TSV110Wr_1cyc_1AB], (instregex "(ADD|AND|EOR|ORR|SUB)S[WX]r(r|i)")>;
383 def : InstRW<[TSV110WrISReg], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]rs$")>;
388 def : InstRW<[TSV110WrISRegBr], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)S[WX]rs$")>;
578 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(AND|BIC|BIF|BIT|BSL|EOR|MVN|NOT|ORN|ORR)v")…
HDAArch64SchedNeoverseV1.td540 def : InstRW<[V1Write_1c_1I], (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>;
1339 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP$")>;
1343 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)S_PPzPP$")>;
1383 "^(AND|EOR|ORR)_ZI$",
1384 "^(AND|BIC|EOR|EOR(BT|TB)?|ORR)_ZP?ZZ",
1385 "^EOR(BT|TB)_ZZZ_[BHSD]$",
1386 "^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]")>;
1531 def : InstRW<[V1Write_12c_4V01], (instregex "^(AND|EOR|OR)V_VPZ_[BHSD]$")>;
HDAArch64SchedExynosM5.td635 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Wrs$")>;
636 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Xrs$")>;
693 def : InstRW<[M5WriteLGW], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?[BHW]$")>;
694 def : InstRW<[M5WriteLGX], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?X$")>;
791 def : InstRW<[M5WriteNALU2], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
HDAArch64SchedNeoverseN2.td658 (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>;
1543 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP$")>;
1781 (instregex "^(AND|EOR|ORR)_ZI",
1782 "^(AND|BIC|EOR|ORR)_ZZZ",
1783 "^EOR(BT|TB)_ZZZ_[BHSD]",
1784 "^(AND|BIC|EOR|NOT|ORR)_(ZPmZ|ZPZZ)_[BHSD]",
HDAArch64SchedA64FX.td1362 // ASIMD logical (AND, BIC, EOR)
1497 (instregex "((AND|ORN|EOR|EON)S?(Xr[rsi]|v16i8|v8i16|v4i32)|" #
2138 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_B")>;
2146 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_H")>;
2154 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_S")>;
2162 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_D")>;
HDAArch64SchedA55.td423 def : InstRW<[CortexA55WriteAluVd_1], (instregex "(AND|EOR|NOT|ORN)v8i8",
425 def : InstRW<[CortexA55WriteAluVq_1], (instregex "(AND|EOR|NOT|ORN)v16i8",
HDAArch64SchedNeoverseV2.td1145 def : InstRW<[V2Write_1cyc_1I], (instregex "^(AND|BIC|EON|EOR|ORN)[WX]rs$")>;
2052 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP")>;
2292 (instregex "^(AND|EOR|ORR)_ZI",
2293 "^(AND|BIC|EOR|ORR)_ZZZ",
2294 "^EOR(BT|TB)_ZZZ_[BHSD]",
2295 "^(AND|BIC|EOR|NOT|ORR)_(ZPmZ|ZPZZ)_[BHSD]",
2405 def : InstRW<[V2Write_6cyc_1V_1V13], (instregex "^(AND|EOR|OR)V_VPZ_[BHSD]")>;
HDAArch64SchedFalkorDetails.td660 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v8i8$")>;
724 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v16i8$")>;
898 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^EOR(W|X)r(i|r|s)$")>;
HDAArch64SchedExynosM3.td501 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
621 def : InstRW<[M3WriteNALU1], (instregex "^(AND|BIC|EOR|MVNI|NOT|ORN|ORR)v")>;
HDAArch64SchedAmpere1B.td921 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]r[sx]")>;
923 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]r[ri]")>;
HDAArch64SchedAmpere1.td939 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)(W|X)r[sx]")>;
941 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)(W|X)r[ri]")>;
HDAArch64SchedExynosM4.td597 def : InstRW<[M4WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
743 def : InstRW<[M4WriteNALU1], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
HDAArch64SchedOryon.td751 (instregex "^AND(W|X)r(i|r|x)", "^EOR(W|X)r(i|r|x)",
757 (instregex "^AND(W|X)rs", "^EOR(W|X)rs", "^ORR(W|X)rs",
/freebsd-14-stable/contrib/tcpdump/
HDprint-telnet.c81 #define EOR 239 /* end of record (transparent mode) */ macro
/freebsd-14-stable/crypto/heimdal/appl/telnet/telnetd/
HDstate.c245 case EOR: in telrcv()
/freebsd-14-stable/share/termcap/
HDtermcap290 :k2=\EOQ:k3=\EOR:k4=\EOS:k5=\EOT:k6=\EOU:k7=\EOV:\
554 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt:sr=5\EM:vt#3:xn:\
583 :k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:\
745 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt:sr=5\EM:xn:\
906 :k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:\
1020 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt:
1050 :k1=\E[001q:k;=\EOQ:F1=\EOR:F2=\EOS:\
1765 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:
2478 :k0=\EOy:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:k5=\EOt:\
2508 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\
[all …]
/freebsd-14-stable/contrib/ncurses/misc/
HDterminfo.src565 kf1=\EOP, kf2=\EOR, kf4=\EOS, nel=\r\ED, ri=\EM, rmir=\E[4l,
842 kf18=\Ew, kf19=\Ex, kf2=\EOQ, kf20=\Ey, kf3=\EOR, kf4=\EOS,
1263 kf1=\EOP, kf10=\EOY, kf2=\EOQ, kf3=\EOR, kf4=\EOS, kf5=\EOT,
1335 kf19=\E[33~, kf2=\EOQ, kf20=\E[34~, kf3=\EOR, kf4=\EOS,
1469 kf27=\E[3~, kf28=\E[4~, kf29=\E[5~, kf3=\EOR, kf30=\E[6~,
1813 kf2=\EOQ, kf20=\E[34~, kf3=\EOR, kf4=\EOS, kf5=\E[17~,
2184 kf3=\EOR, kf4=\EOS, kf5=\E[15~, kf6=\E[17~, kf7=\E[18~,
2204 kf2=\EOQ, kf3=\EOR, kf4=\EOS, kf5=\E[15~, kf6=\E[17~,
2442 kent=\EOM, kf1=\EOP, kf2=\EOQ, kf3=\EOR, kf4=\EOS,
2619 kf3=\EOR, kf4=\EOS, nel=\r\n, rev=\E[7m$<2/>, ri=\EM$<5/>,
[all …]
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMScheduleM85.td412 (instregex "t2(ADC|ADDS|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|"
421 (instregex "t2(ADC|ADDS|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|"
HDARMScheduleM7.td326 (instregex "t2(ADC|ADDS|ADD|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|SUBS)rs$",

12