| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| HD | MipsExpandPseudo.cpp | 86 unsigned BEQ = Mips::BEQ; in expandAtomicCmpSwapSubword() local
94 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword()
167 BuildMI(loop2MBB, DL, TII->get(BEQ)) in expandAtomicCmpSwapSubword()
213 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local
220 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap()
229 BEQ = Mips::BEQ; in expandAtomicCmpSwap()
239 BEQ = Mips::BEQ64; in expandAtomicCmpSwap()
289 BuildMI(loop2MBB, DL, TII->get(BEQ)) in expandAtomicCmpSwap()
312 unsigned BEQ = Mips::BEQ; in expandAtomicBinOpSubword() local
318 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicBinOpSubword()
[all …]
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| HD | MipsInstrInfo.cpp | 303 case Mips::BEQ: case Mips::BEQ64: in isBranchOffsetInRange()
461 case Mips::BEQ: in getEquivalentCompactForm()
494 case Mips::BEQ: in getEquivalentCompactForm()
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| HD | MipsSEInstrInfo.cpp | 475 case Mips::BEQ: return Mips::BNE; in getOppositeBranchOpc()
477 case Mips::BNE: return Mips::BEQ; in getOppositeBranchOpc()
630 return (Opc == Mips::BEQ || Opc == Mips::BEQ_MM || Opc == Mips::BNE || in getAnalyzableBrOpc()
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| HD | MipsAsmPrinter.cpp | 1180 EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::BEQ) in EmitSled()
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| HD | MipsInstrInfo.td | 2225 def BEQ : MMRel, CBranch<"beq", brtarget, seteq, GPR32Opnd>, BEQ_FM<4>,
2249 def B : UncondBranch<BEQ, brtarget>, ISA_MIPS1;
2833 def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>,
2843 (BEQ GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
3285 defm : BrcondPats<GPR32, BEQ, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>,
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| HD | MipsScheduleP5600.td | 72 def : InstRW<[P5600WriteJump], (instrs B, BAL, BAL_BR, BEQ, BEQL, BGEZ, BGEZAL,
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| HD | Mips64InstrInfo.td | 787 defm : BrcondPats<GPR64, BEQ64, BEQ, BNE64, SLT64, SLTu64, SLTi64, SLTiu64,
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| HD | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
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| /freebsd-14-stable/contrib/llvm-project/compiler-rt/lib/xray/ |
| HD | xray_trampoline_arm.S | 29 BEQ FunctionEntry_restore
61 BEQ FunctionExit_restore
92 BEQ FunctionTailExit_restore
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| HD | LoongArchInstrInfo.cpp | 332 case LoongArch::BEQ: in isBranchOffsetInRange()
490 case LoongArch::BEQ: in getOppositeBranchOpc()
493 return LoongArch::BEQ; in getOppositeBranchOpc()
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| HD | LoongArchInstrInfo.td | 820 def BEQ : BrCC_2RI16<0x58000000>;
1440 def : BccPat<seteq, BEQ>;
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| HD | RISCVAsmBackend.cpp | 189 case RISCV::BEQ: in relaxInstruction()
352 return RISCV::BEQ; in getRelaxedOpcode()
358 case RISCV::BEQ: in getRelaxedOpcode()
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| HD | RISCVMCCodeEmitter.cpp | 231 return RISCV::BEQ; in getInvertedBranchOp()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| HD | RISCVRedundantCopyElimination.cpp | 146 assert((CondBr->getOpcode() == RISCV::BEQ || in optimizeBlock()
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| HD | RISCVAsmPrinter.cpp | 604 MCInstBuilder(RISCV::BEQ) in LowerKCFI_CHECK()
733 MCInstBuilder(RISCV::BEQ) in EmitHwasanMemaccessSymbols()
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| HD | RISCVInstrInfoC.td | 969 def : CompressPat<(BEQ GPRC:$rs1, X0, simm9_lsb0:$imm),
972 def : CompressPat<(BEQ X0, GPRC:$rs1, simm9_lsb0:$imm),
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| HD | RISCVInstrInfo.td | 628 def BEQ : BranchCC_rri<0b000, "beq">;
907 (BEQ GPR:$rs, X0, simm13_lsb0:$offset)>;
1454 defm : BccPat<SETEQ, BEQ>;
1462 def : BrccCompressOpt<SETEQ, BEQ>;
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| HD | RISCVInstrInfo.cpp | 853 case RISCV::BEQ: in getCondFromBranchOpc()
888 return Imm ? RISCV::CV_BEQIMM : RISCV::BEQ; in getBrCond()
1274 case RISCV::BEQ: in isBranchOffsetInRange()
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| HD | RISCVISelLowering.cpp | 18715 BuildMI(MBB, DL, TII.get(RISCV::BEQ)) in emitFROUND()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsInstPrinter.cpp | 273 case Mips::BEQ: in printAlias()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| HD | LoongArchMCCodeEmitter.cpp | 309 case LoongArch::BEQ: in getExprOpValue()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| HD | MipsAsmParser.cpp | 1895 case Mips::BEQ: in processInstruction()
2100 BInst.setOpcode(inMicroMipsMode() ? Mips::BEQ_MM : Mips::BEQ); in processInstruction()
3702 OpCode = Mips::BEQ; in expandBranchImm()
4132 TOut.emitRRX(Mips::BEQ, Mips::ZERO, Mips::ZERO, in expandCondBranches()
4157 TOut.emitRRX(Mips::BEQ, Mips::ZERO, Mips::ZERO, in expandCondBranches()
4175 TOut.emitRRX(AcceptsEquality ? Mips::BEQ : Mips::BNE, in expandCondBranches()
4218 : (AcceptsEquality ? Mips::BEQ : Mips::BNE), in expandCondBranches()
5277 TOut.emitRRX(Mips::BEQ, DstReg, ATReg, LabelOp, IDLoc, STI); in expandMulO()
5314 TOut.emitRRX(Mips::BEQ, ATReg, Mips::ZERO, LabelOp, IDLoc, STI); in expandMulOU()
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| /freebsd-14-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/ |
| HD | EmulateInstructionRISCV.cpp | 49 constexpr uint32_t BEQ = 0b000; variable
170 case BEQ: in CompareB()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| HD | XtensaInstrInfo.td | 322 def BEQ : Branch_RR<0x01, "beq", SETEQ>;
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| HD | XtensaISelLowering.cpp | 528 return Xtensa::BEQ; in getBranchOpcode()
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