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Searched refs:ADDlow (Results 1 – 4 of 4) sorted by relevance

/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.h90 ADDlow, // Add the low 12 bits of a TargetGlobalAddress operand. enumerator
HDAArch64ISelDAGToDAG.cpp1121 if (N.getOpcode() == AArch64ISD::ADDlow && isWorthFoldingADDlow(N)) { in SelectAddrModeIndexed()
3862 if (LN->getOperand(1).getOpcode() != AArch64ISD::ADDlow || in checkCVTFixedPointOperandWithFBits()
HDAArch64ISelLowering.cpp2365 case AArch64ISD::ADDlow: { in computeKnownBitsForTargetNode()
2547 MAKE_CASE(AArch64ISD::ADDlow) in getTargetNodeName()
9234 return DAG.getNode(AArch64ISD::ADDlow, DL, Ty, ADRP, Lo); in getAddr()
9612 DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, TLSIndexLo); in LowerWindowsGlobalTLSAddress()
9639 Addr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, Addr, TGALo); in LowerWindowsGlobalTLSAddress()
HDAArch64InstrInfo.td638 def AArch64addlow : SDNode<"AArch64ISD::ADDlow", SDTIntBinOp, []>;