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Searched refs:mdev (Results 1 – 25 of 79) sorted by relevance

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/freebsd-13-stable/sys/dev/mthca/
HDmthca_main.c137 static int mthca_tune_pci(struct mthca_dev *mdev) in mthca_tune_pci() argument
143 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { in mthca_tune_pci()
144 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { in mthca_tune_pci()
145 mthca_err(mdev, "Couldn't set PCI-X max read count, " in mthca_tune_pci()
149 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) in mthca_tune_pci()
150 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); in mthca_tune_pci()
152 if (pci_is_pcie(mdev->pdev)) { in mthca_tune_pci()
153 if (pcie_set_readrq(mdev->pdev, 4096)) { in mthca_tune_pci()
154 mthca_err(mdev, "Couldn't write PCI Express read request, " in mthca_tune_pci()
158 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) in mthca_tune_pci()
[all …]
HDmthca_reset.c41 int mthca_reset(struct mthca_dev *mdev) in mthca_reset() argument
73 if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) { in mthca_reset()
77 while ((bridge = pci_get_device(mdev->pdev->vendor, in mthca_reset()
78 mdev->pdev->device + 2, in mthca_reset()
81 bridge->subordinate == mdev->pdev->bus) { in mthca_reset()
82 mthca_dbg(mdev, "Found bridge: %s\n", in mthca_reset()
94 mthca_warn(mdev, "No bridge found for %s\n", in mthca_reset()
95 pci_name(mdev->pdev)); in mthca_reset()
98 mthca_warn(mdev, "Reset on PCI-X is not supported.\n"); in mthca_reset()
108 mthca_err(mdev, "Couldn't allocate memory to save HCA " in mthca_reset()
[all …]
/freebsd-13-stable/sys/dev/mlx4/mlx4_en/
HDmlx4_en_main.c75 static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) in mlx4_en_get_profile() argument
77 struct mlx4_en_profile *params = &mdev->profile; in mlx4_en_get_profile()
83 if (params->udp_rss && !(mdev->dev->caps.flags in mlx4_en_get_profile()
85 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); in mlx4_en_get_profile()
114 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; in mlx4_en_event() local
120 if (!mdev->pndev[port]) in mlx4_en_event()
122 priv = mlx4_netdev_priv(mdev->pndev[port]); in mlx4_en_event()
126 queue_work(mdev->workqueue, &priv->linkstate_task); in mlx4_en_event()
130 mlx4_err(mdev, "Internal error detected, restarting device\n"); in mlx4_en_event()
138 !mdev->pndev[port]) in mlx4_en_event()
[all …]
HDmlx4_en_cq.c57 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_cq() local
71 cq->buf_size = cq->size * mdev->dev->caps.cqe_size; in mlx4_en_create_cq()
88 cq->vector = mdev->dev->caps.num_comp_vectors; in mlx4_en_create_cq()
91 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres, in mlx4_en_create_cq()
106 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); in mlx4_en_create_cq()
116 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_activate_cq() local
121 cq->dev = mdev->pndev[priv->port]; in mlx4_en_activate_cq()
129 if (!mlx4_is_eq_vector_valid(mdev->dev, priv->port, in mlx4_en_activate_cq()
131 cq->vector = cq_idx % mdev->dev->caps.num_comp_vectors; in mlx4_en_activate_cq()
133 err = mlx4_assign_eq(mdev->dev, priv->port, in mlx4_en_activate_cq()
[all …]
HDmlx4_en_netdev.c188 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_work()
193 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); in mlx4_en_filter_work()
259 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_free()
341 queue_work(priv->mdev->workqueue, &filter->work); in mlx4_en_filter_rfs()
406 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_vlan_rx_add_vid() local
418 mutex_lock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
419 if (mdev->device_up && priv->port_up) { in mlx4_en_vlan_rx_add_vid()
420 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); in mlx4_en_vlan_rx_add_vid()
424 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) in mlx4_en_vlan_rx_add_vid()
426 mutex_unlock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
[all …]
/freebsd-13-stable/sys/dev/mlx5/mlx5_core/
HDmlx5_fwdump.c55 mlx5_fwdump_destroy_dd(struct mlx5_core_dev *mdev) in mlx5_fwdump_destroy_dd() argument
58 mtx_assert(&mdev->dump_lock, MA_OWNED); in mlx5_fwdump_destroy_dd()
59 free(mdev->dump_data, M_MLX5_DUMP); in mlx5_fwdump_destroy_dd()
60 mdev->dump_data = NULL; in mlx5_fwdump_destroy_dd()
69 mlx5_fwdump_prep(struct mlx5_core_dev *mdev) in mlx5_fwdump_prep() argument
76 mdev->dump_data = NULL; in mlx5_fwdump_prep()
80 mlx5_core_warn(mdev, in mlx5_fwdump_prep()
87 error = mlx5_vsc_find_cap(mdev); in mlx5_fwdump_prep()
90 mlx5_core_warn(mdev, in mlx5_fwdump_prep()
95 error = mlx5_vsc_lock(mdev); in mlx5_fwdump_prep()
[all …]
HDmlx5_vsc.c33 int mlx5_vsc_lock(struct mlx5_core_dev *mdev) in mlx5_vsc_lock() argument
35 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_lock()
36 int vsc_addr = mdev->vsc_addr; in mlx5_vsc_lock()
42 mlx5_core_warn(mdev, "Unable to acquire vsc lock, vsc_addr not initialized\n"); in mlx5_vsc_lock()
73 void mlx5_vsc_unlock(struct mlx5_core_dev *mdev) in mlx5_vsc_unlock() argument
75 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_unlock()
76 int vsc_addr = mdev->vsc_addr; in mlx5_vsc_unlock()
79 mlx5_core_warn(mdev, "Unable to release vsc lock, vsc_addr not initialized\n"); in mlx5_vsc_unlock()
87 mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected) in mlx5_vsc_wait_on_flag() argument
89 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_wait_on_flag()
[all …]
HDmlx5_wq.c63 int mlx5_wq_cyc_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_wq_cyc_create() argument
73 err = mlx5_db_alloc(mdev, &wq_ctrl->db); in mlx5_wq_cyc_create()
75 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
79 err = mlx5_buf_alloc(mdev, mlx5_wq_cyc_get_byte_size(wq), in mlx5_wq_cyc_create()
82 mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
89 wq_ctrl->mdev = mdev; in mlx5_wq_cyc_create()
94 mlx5_db_free(mdev, &wq_ctrl->db); in mlx5_wq_cyc_create()
99 int mlx5_cqwq_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_cqwq_create() argument
110 err = mlx5_db_alloc(mdev, &wq_ctrl->db); in mlx5_cqwq_create()
112 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_cqwq_create()
[all …]
HDmlx5_uar.c60 static int uars_per_sys_page(struct mlx5_core_dev *mdev) in uars_per_sys_page() argument
62 if (MLX5_CAP_GEN(mdev, uar_4k)) in uars_per_sys_page()
63 return MLX5_CAP_GEN(mdev, num_of_uars_per_page); in uars_per_sys_page()
68 static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index) in uar2pfn() argument
72 if (MLX5_CAP_GEN(mdev, uar_4k)) in uar2pfn()
77 return (pci_resource_start(mdev->pdev, 0) >> PAGE_SHIFT) + system_page_index; in uar2pfn()
86 if (mlx5_cmd_free_uar(up->mdev, up->index)) in up_rel_func()
87 mlx5_core_warn(up->mdev, "failed to free uar index %d\n", up->index); in up_rel_func()
93 static struct mlx5_uars_page *alloc_uars_page(struct mlx5_core_dev *mdev, in alloc_uars_page() argument
102 bfregs = uars_per_sys_page(mdev) * MLX5_BFREGS_PER_UAR; in alloc_uars_page()
[all …]
HDmlx5_vport.c34 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
37 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, in _mlx5_query_vport_state() argument
50 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); in _mlx5_query_vport_state()
52 mlx5_core_warn(mdev, "MLX5_CMD_OP_QUERY_VPORT_STATE failed\n"); in _mlx5_query_vport_state()
57 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport) in mlx5_query_vport_state() argument
61 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out)); in mlx5_query_vport_state()
67 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport) in mlx5_query_vport_admin_state() argument
71 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out)); in mlx5_query_vport_admin_state()
77 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, in mlx5_modify_vport_admin_state() argument
94 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_modify_vport_admin_state()
[all …]
HDmlx5_port.c70 int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam, in mlx5_query_qcam_reg() argument
79 return mlx5_core_access_reg(mdev, in, sz, qcam, sz, MLX5_REG_QCAM, 0, 0); in mlx5_query_qcam_reg()
792 int mlx5_query_port_cong_status(struct mlx5_core_dev *mdev, int protocol, in mlx5_query_port_cong_status() argument
806 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_query_port_cong_status()
812 int mlx5_modify_port_cong_status(struct mlx5_core_dev *mdev, int protocol, in mlx5_modify_port_cong_status() argument
824 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_modify_port_cong_status()
827 int mlx5_query_port_cong_params(struct mlx5_core_dev *mdev, int protocol, in mlx5_query_port_cong_params() argument
836 return mlx5_cmd_exec(mdev, in, sizeof(in), out, out_size); in mlx5_query_port_cong_params()
839 static int mlx5_query_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *out, in mlx5_query_port_qetcr_reg() argument
844 if (!MLX5_CAP_GEN(mdev, ets)) in mlx5_query_port_qetcr_reg()
[all …]
HDmlx5_tls.c36 int mlx5_encryption_key_create(struct mlx5_core_dev *mdev, u32 pdn, in mlx5_encryption_key_create() argument
44 general_obj_types = MLX5_CAP_GEN_64(mdev, general_obj_types); in mlx5_encryption_key_create()
74 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_encryption_key_create()
84 int mlx5_encryption_key_destroy(struct mlx5_core_dev *mdev, u32 oid) in mlx5_encryption_key_destroy() argument
93 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_encryption_key_destroy()
96 int mlx5_tls_open_tis(struct mlx5_core_dev *mdev, int tc, int tdn, int pdn, u32 *p_tisn) in mlx5_tls_open_tis() argument
107 err = mlx5_core_create_tis(mdev, in, sizeof(in), p_tisn); in mlx5_tls_open_tis()
116 void mlx5_tls_close_tis(struct mlx5_core_dev *mdev, u32 tisn) in mlx5_tls_close_tis() argument
119 mlx5_core_destroy_tis(mdev, tisn); in mlx5_tls_close_tis()
122 int mlx5_tls_open_tir(struct mlx5_core_dev *mdev, int tdn, int rqtn, u32 *p_tirn) in mlx5_tls_open_tir() argument
[all …]
/freebsd-13-stable/sys/dev/mlx5/
HDvport.h37 int mlx5_vport_alloc_q_counter(struct mlx5_core_dev *mdev, int client_id,
39 int mlx5_vport_dealloc_q_counter(struct mlx5_core_dev *mdev, int client_id,
41 int mlx5_vport_query_q_counter(struct mlx5_core_dev *mdev,
46 int mlx5_vport_query_out_of_rx_buffer(struct mlx5_core_dev *mdev,
54 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev,
57 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable);
58 int mlx5_nic_vport_modify_local_lb(struct mlx5_core_dev *mdev,
61 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport);
62 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
64 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
[all …]
HDdevice.h988 #define MLX5_CAP_GEN(mdev, cap) \ argument
989 MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
991 #define MLX5_CAP_GEN_64(mdev, cap) \ argument
992 MLX5_GET64(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
994 #define MLX5_CAP_GEN_MAX(mdev, cap) \ argument
995 MLX5_GET(cmd_hca_cap, mdev->hca_caps_max[MLX5_CAP_GENERAL], cap)
997 #define MLX5_CAP_ETH(mdev, cap) \ argument
999 mdev->hca_caps_cur[MLX5_CAP_ETHERNET_OFFLOADS], cap)
1001 #define MLX5_CAP_ETH_MAX(mdev, cap) \ argument
1003 mdev->hca_caps_max[MLX5_CAP_ETHERNET_OFFLOADS], cap)
[all …]
HDport.h202 int mlx5_max_tc(struct mlx5_core_dev *mdev);
203 int mlx5_query_port_tc_rate_limit(struct mlx5_core_dev *mdev,
206 int mlx5_modify_port_tc_rate_limit(struct mlx5_core_dev *mdev,
209 int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
211 int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, int prio_index,
213 int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, const u8 *tc_group);
214 int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
216 int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, const u8 *tc_bw);
217 int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *bw_pct);
219 int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);
[all …]
/freebsd-13-stable/sys/dev/mlx5/mlx5_fpga/
HDmlx5fpga_core.c153 err = mlx5_fpga_query(fdev->mdev, &query); in mlx5_fpga_device_load_check()
167 fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id); in mlx5_fpga_device_load_check()
184 struct mlx5_core_dev *mdev = fdev->mdev; in mlx5_fpga_device_brb() local
186 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_ON); in mlx5_fpga_device_brb()
191 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RESET_SANDBOX); in mlx5_fpga_device_brb()
196 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_OFF); in mlx5_fpga_device_brb()
204 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev) in mlx5_fpga_device_start() argument
207 struct mlx5_fpga_device *fdev = mdev->fpga; in mlx5_fpga_device_start()
220 err = mlx5_fpga_caps(fdev->mdev); in mlx5_fpga_device_start()
228 fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id); in mlx5_fpga_device_start()
[all …]
HDcore.h59 struct mlx5_core_dev *mdev; member
85 dev_dbg(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
89 dev_err(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
93 dev_warn(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
97 dev_warn_ratelimited(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d: " \
101 dev_notice(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
104 dev_info(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
106 int mlx5_fpga_init(struct mlx5_core_dev *mdev);
107 void mlx5_fpga_cleanup(struct mlx5_core_dev *mdev);
108 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev);
[all …]
HDipsec.h40 void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
44 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
45 unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
46 int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
49 int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
50 void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
54 static inline void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev, in mlx5_fpga_ipsec_sa_cmd_exec() argument
65 static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_device_caps() argument
71 mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_counters_count() argument
76 static inline int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, in mlx5_fpga_ipsec_counters_read() argument
[all …]
HDmlx5fpga_sdk.c141 if (!fdev->mdev) in mlx5_fpga_mem_read_i2c()
147 err = mlx5_fpga_access_reg(fdev->mdev, actual_size, in mlx5_fpga_mem_read_i2c()
173 if (!fdev->mdev) in mlx5_fpga_mem_write_i2c()
179 err = mlx5_fpga_access_reg(fdev->mdev, actual_size, in mlx5_fpga_mem_write_i2c()
261 return mlx5_fpga_sbu_caps(fdev->mdev, buf, size); in mlx5_fpga_get_sbu_caps()
267 return (u64)MLX5_CAP_FPGA(fdev->mdev, fpga_ddr_size) << 10; in mlx5_fpga_ddr_size_get()
273 return MLX5_CAP64_FPGA(fdev->mdev, fpga_ddr_start_addr); in mlx5_fpga_ddr_base_get()
327 struct mlx5_core_dev *mdev = fdev->mdev; in mlx5_fpga_device_reload_cmd() local
335 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RELOAD); in mlx5_fpga_device_reload_cmd()
350 err = mlx5_fpga_device_start(mdev); in mlx5_fpga_device_reload_cmd()
[all …]
HDmlx5fpga_ipsec.c78 static bool mlx5_fpga_is_ipsec_device(struct mlx5_core_dev *mdev) in mlx5_fpga_is_ipsec_device() argument
80 if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga)) in mlx5_fpga_is_ipsec_device()
83 if (MLX5_CAP_FPGA(mdev, ieee_vendor_id) != in mlx5_fpga_is_ipsec_device()
87 if (MLX5_CAP_FPGA(mdev, sandbox_product_id) != in mlx5_fpga_is_ipsec_device()
174 void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev, in mlx5_fpga_ipsec_sa_cmd_exec() argument
178 struct mlx5_fpga_device *fdev = mdev->fpga; in mlx5_fpga_ipsec_sa_cmd_exec()
236 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_device_caps() argument
238 struct mlx5_fpga_device *fdev = mdev->fpga; in mlx5_fpga_ipsec_device_caps()
241 if (mlx5_fpga_is_ipsec_device(mdev)) in mlx5_fpga_ipsec_device_caps()
261 unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_counters_count() argument
[all …]
HDmlx5fpga_conn.c55 dma_device = &conn->fdev->mdev->pdev->dev; in mlx5_fpga_conn_map_buf()
87 dma_device = &conn->fdev->mdev->pdev->dev; in mlx5_fpga_conn_unmap_buf()
220 static int mlx5_fpga_conn_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, in mlx5_fpga_conn_create_mkey() argument
241 err = mlx5_core_create_mkey(mdev, mkey, in, inlen); in mlx5_fpga_conn_create_mkey()
428 struct mlx5_core_dev *mdev = fdev->mdev; in mlx5_fpga_conn_create_cq() local
441 wqp.buf_numa_node = mdev->priv.numa_node; in mlx5_fpga_conn_create_cq()
442 wqp.db_numa_node = mdev->priv.numa_node; in mlx5_fpga_conn_create_cq()
444 err = mlx5_cqwq_create(mdev, &wqp, temp_cqc, &conn->cq.wq, in mlx5_fpga_conn_create_cq()
462 err = mlx5_vector2eqn(mdev, smp_processor_id(), &eqn, &irqn); in mlx5_fpga_conn_create_cq()
477 err = mlx5_core_create_cq(mdev, &conn->cq.mcq, in, inlen); in mlx5_fpga_conn_create_cq()
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/freebsd-13-stable/sys/dev/mlx5/mlx5_accel/
HDipsec.h65 #define MLX5_IPSEC_DEV(mdev) (mlx5_accel_ipsec_device_caps(mdev) & \ argument
102 void *mlx5_accel_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
113 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev);
115 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev);
116 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
119 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
120 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev);
124 #define MLX5_IPSEC_DEV(mdev) false argument
126 static inline int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev) in mlx5_accel_ipsec_init() argument
131 static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev) in mlx5_accel_ipsec_cleanup() argument
/freebsd-13-stable/sys/dev/mlx5/mlx5_en/
HDmlx5_en_ethtool.c111 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_getmaxrate() local
118 err = -mlx5_query_port_tc_rate_limit(mdev, max_bw_value, max_bw_unit); in mlx5e_getmaxrate()
122 for (i = 0; i <= mlx5_max_tc(mdev); i++) { in mlx5e_getmaxrate()
147 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_get_max_alloc() local
152 err = -mlx5_query_port_tc_bw_alloc(mdev, priv->params_ethtool.max_bw_share); in mlx5e_get_max_alloc()
159 err = -mlx5_set_port_tc_bw_alloc(mdev, in mlx5e_get_max_alloc()
170 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_get_dscp() local
173 if (MLX5_CAP_GEN(mdev, qcam_reg) == 0 || in mlx5e_get_dscp()
174 MLX5_CAP_QCAM_REG(mdev, qpts) == 0 || in mlx5e_get_dscp()
175 MLX5_CAP_QCAM_REG(mdev, qpdpm) == 0) in mlx5e_get_dscp()
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HDmlx5_en_main.c357 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_carrier() local
368 port_state = mlx5_query_vport_state(mdev, in mlx5e_update_carrier()
380 error = mlx5_query_port_ptys(mdev, out, sizeof(out), in mlx5e_update_carrier()
390 ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); in mlx5e_update_carrier()
397 error = mlx5_query_pddr_cable_type(mdev, 1, &cable_type); in mlx5e_update_carrier()
423 error = mlx5_query_pddr_range_info(mdev, 1, &is_er_type); in mlx5e_update_carrier()
432 error = mlx5_query_pddr_range_info(mdev, 1, &is_er_type); in mlx5e_update_carrier()
497 return (mlx5_set_port_pause_and_pfc(priv->mdev, 1, in mlx5e_set_port_pause_and_pfc()
526 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_media_change() local
544 error = mlx5_query_port_ptys(mdev, out, sizeof(out), in mlx5e_media_change()
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/freebsd-13-stable/sys/dev/mlx5/mlx5_ib/
HDmlx5_ib_main.c82 int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type); in mlx5_ib_port_link_layer()
88 struct mlx5_core_dev *mdev, in mlx5_netdev_match() argument
95 *(struct mlx5_core_dev **)ndev->if_softc == mdev; in mlx5_netdev_match()
110 if (mlx5_netdev_match(ndev, ibdev->mdev, "mce")) in mlx5_netdev_event()
301 err = mlx5_query_port_ptys(dev->mdev, out, sizeof(out), MLX5_PTYS_EN, in mlx5_query_port_roce()
306 ext = MLX5_CAP_PCAM_FEATURE(dev->mdev, ptys_extended_ethernet); in mlx5_query_port_roce()
319 props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev, in mlx5_query_port_roce()
322 props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg); in mlx5_query_port_roce()
327 mlx5_query_nic_vport_qkey_viol_cntr(dev->mdev, &qkey_viol_cntr); in mlx5_query_port_roce()
415 return mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out)); in set_roce_addr()
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