Searched refs:clk_base (Results 1 – 2 of 2) sorted by relevance
192 uint32_t clk_base; in bhnd_pwrctl_clock_rate() local230 clk_base = CHIPC_CLOCK_BASE2; in bhnd_pwrctl_clock_rate()232 clk_base = CHIPC_CLOCK_BASE1; in bhnd_pwrctl_clock_rate()235 clock = clk_base * n1 * n2; in bhnd_pwrctl_clock_rate()
340 uint32_t clk_base; in sdhci_set_clock() local359 clk_base = slot->max_clk; in sdhci_set_clock()367 if ((clk_base / BCM577XX_DEFAULT_MAX_DIVIDER) > clock) { in sdhci_set_clock()368 clk_base = BCM577XX_ALT_CLOCK_BASE; in sdhci_set_clock()385 res = clk_base; in sdhci_set_clock()395 if (clock >= clk_base) in sdhci_set_clock()399 if ((clk_base / div) <= clock) in sdhci_set_clock()408 div, clock, clk_base); in sdhci_set_clock()