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/freebsd-13-stable/sys/contrib/libsodium/src/libsodium/crypto_pwhash/scryptsalsa208sha256/sse/
HDpwhash_scryptsalsa208sha256_sse.c67 ARX(X1, X0, X3, 7) \
69 ARX(X3, X2, X1, 13) \
70 ARX(X0, X3, X2, 18) \
75 X3 = _mm_shuffle_epi32(X3, 0x39); \
78 ARX(X3, X0, X1, 7) \
79 ARX(X2, X3, X0, 9) \
80 ARX(X1, X2, X3, 13) \
86 X3 = _mm_shuffle_epi32(X3, 0x93);
96 __m128i Y3 = X3 = _mm_xor_si128(X3, (in)[3]); \
103 (out)[3] = X3 = _mm_add_epi32(X3, Y3); \
[all …]
/freebsd-13-stable/crypto/openssl/crypto/seed/
HDseed_local.h57 # define KEYSCHEDULE_UPDATE0(T0, T1, X1, X2, X3, X4, KC) \ argument
58 (T0) = (X3); \
59 (X3) = (((X3)<<8) ^ ((X4)>>24)) & 0xffffffff; \
61 (T0) = ((X1) + (X3) - (KC)) & 0xffffffff; \
64 # define KEYSCHEDULE_UPDATE1(T0, T1, X1, X2, X3, X4, KC) \ argument
68 (T0) = ((X1) + (X3) - (KC)) & 0xffffffff; \
99 # define E_SEED(T0, T1, X1, X2, X3, X4, rbase) \ argument
100 (T0) = (X3) ^ (ks->data)[(rbase)]; \
/freebsd-13-stable/sys/contrib/libsodium/src/libsodium/crypto_aead/aes256gcm/aesni/
HDaead_aes256gcm_aesni.c62 __m128i X0, X1, X2, X3; in aesni_key256_expand() local
73 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X0), 0x10)); \ in aesni_key256_expand()
74 X0 = _mm_xor_si128(X0, X3); \ in aesni_key256_expand()
75 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X0), 0x8c)); \ in aesni_key256_expand()
76 X0 = _mm_xor_si128(_mm_xor_si128(X0, X3), X1); \ in aesni_key256_expand()
82 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X2), 0x10)); \ in aesni_key256_expand()
83 X2 = _mm_xor_si128(X2, X3); \ in aesni_key256_expand()
84 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X2), 0x8c)); \ in aesni_key256_expand()
85 X2 = _mm_xor_si128(_mm_xor_si128(X2, X3), X1); \ in aesni_key256_expand()
89 X3 = _mm_setzero_si128(); in aesni_key256_expand()
[all …]
/freebsd-13-stable/sys/contrib/openzfs/module/icp/algs/skein/
HDskein_block.c89 uint64_t X0, X1, X2, X3; in Skein_256_Process_Block() local
97 Xptr[3] = &X3; in Skein_256_Process_Block()
126 X3 = w[3] + ks[3]; in Skein_256_Process_Block()
148 X3 += ks[((R) + 4) % 5] + (R) + 1; \ in Skein_256_Process_Block()
159 X3 += ks[r + (R) + 3] + r + (R); \ in Skein_256_Process_Block()
238 ctx->X[3] = X3 ^ w[3]; in Skein_256_Process_Block()
293 uint64_t X0, X1, X2, X3, X4, X5, X6, X7; in Skein_512_Process_Block() local
301 Xptr[3] = &X3; in Skein_512_Process_Block()
340 X3 = w[3] + ks[3]; in Skein_512_Process_Block()
366 X3 += ks[((R) + 4) % 9]; \ in Skein_512_Process_Block()
[all …]
/freebsd-13-stable/sys/crypto/skein/
HDskein_block.c81 u64b_t X0,X1,X2,X3; /* local copy of context vars, for speed */ in Skein_256_Process_Block() local
85 Xptr[0] = &X0; Xptr[1] = &X1; Xptr[2] = &X2; Xptr[3] = &X3; in Skein_256_Process_Block()
110 X3 = w[3] + ks[3]; in Skein_256_Process_Block()
131 X3 += ks[((R)+4) % 5] + (R)+1; \ in Skein_256_Process_Block()
142 X3 += ks[r+(R)+3] + r+(R) ; \ in Skein_256_Process_Block()
216 ctx->X[3] = X3 ^ w[3]; in Skein_256_Process_Block()
266 u64b_t X0,X1,X2,X3,X4,X5,X6,X7; /* local copy of vars, for speed */ in Skein_512_Process_Block() local
270 Xptr[0] = &X0; Xptr[1] = &X1; Xptr[2] = &X2; Xptr[3] = &X3; in Skein_512_Process_Block()
302 X3 = w[3] + ks[3]; in Skein_512_Process_Block()
327 X3 += ks[((R)+4) % 9]; \ in Skein_512_Process_Block()
[all …]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCCallingConv.td57 CCIfType<[i64], CCAssignToReg<[X3]>>,
58 CCIfType<[i128], CCAssignToReg<[X3]>>,
79 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
80 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
129 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
167 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
183 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
184 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
HDPPCCallingConv.cpp34 static const MCPhysReg ELF64ArgGPRs[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6, in CC_PPC64_ELF_Shadow_GPR_Regs()
53 if ((State.AllocateReg(ELF64ArgGPRs) - PPC::X3) % 2 == 1) in CC_PPC64_ELF_Shadow_GPR_Regs()
HDPPCTLSDynamicCall.cpp96 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3; in processBlock()
HDPPCInstr64Bit.td1537 // LR8 is a true define, while the rest of the Defs are clobbers. X3 is
1546 // LR8 is a true define, while the rest of the Defs are clobbers. X3 is
1553 // On AIX, the call to __tls_get_addr needs two inputs in X3/X4 for the
1564 // On AIX, the call to .__tls_get_mod needs one input in X3 for the module handle.
1573 // Combined op for ADDItlsgdL and GETtlsADDR, late expanded. X3 and LR8
1576 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1606 // Combined op for ADDItlsldL and GETtlsADDR, late expanded. X3 and LR8
1609 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64CallingConvention.td95 [X0, X1, X3, X5]>>>,
100 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
146 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
210 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3]>>,
265 [X0, X1, X2, X3]>>,
268 [X0, X1, X2, X3]>>,
271 [X0, X1, X2, X3]>>,
281 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3],
385 CCIfSplit<CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6]>>>,
389 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
[all …]
HDAArch64CallingConvention.cpp24 AArch64::X3, AArch64::X4, AArch64::X5,
HDAArch64Processors.td235 "Cortex-X3 ARM processors", [
815 list<SubtargetFeature> X3 = [HasV9_0aOps, FeatureSVE, FeatureNEON,
1121 def : ProcessorModel<"cortex-x3", NeoverseN2Model, ProcessorFeatures.X3,
/freebsd-13-stable/sys/crypto/aesni/
HDaesni_ghash.c162 __m128i X1, __m128i X2, __m128i X3, __m128i X4, __m128i *res) in reduce4() argument
173 H3_X3_lo = _mm_clmulepi64_si128(H3, X3, 0x00); in reduce4()
182 H3_X3_hi = _mm_clmulepi64_si128(H3, X3, 0x11); in reduce4()
198 tmp6 = _mm_shuffle_epi32(X3, 78); in reduce4()
200 tmp6 = _mm_xor_si128(tmp6, X3); in reduce4()
/freebsd-13-stable/
HDCOPYRIGHT67 National Standards Committee X3, on Information Processing Systems have
85 Standards Committee X3, on Information Processing Systems. Computer and
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
HDRISCVBaseInfo.cpp105 MCRegister getSCSPReg() { return RISCV::X3; } in getSCSPReg()
/freebsd-13-stable/sys/contrib/device-tree/src/arm/
HDtegra30-colibri-eval-v3.dts77 /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
HDtegra20-colibri-iris.dts141 /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
HDtegra20-colibri-eval-v3.dts141 /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
HDmeson8b-odroidc1.dts94 /* X3 in the schematics */
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
HDAArch64BaseInfo.h35 case AArch64::X3: return AArch64::W3; in getWRegFromXReg()
75 case AArch64::W3: return AArch64::X3; in getXRegFromWReg()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVRegisterInfo.td90 def X3 : RISCVReg<3, "x3", ["gp"]>, DwarfRegNum<[3]>;
174 // X3, and X4 as it reduces the number of register classes that get synthesized
/freebsd-13-stable/sys/contrib/device-tree/src/arm64/freescale/
HDimx8qxp-colibri.dtsi297 /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
/freebsd-13-stable/contrib/mandoc/
HDINSTALL137 As far as mandoc is using any features not mandated by ANSI X3.159-1989
/freebsd-13-stable/contrib/file/magic/Magdir/
HDole2compounddocs112 >>>>128 lestring16 PerfectOffice_ : WordPerfect 7-X3 presentations Master, Document or Graphic
613 >>>80 ubequad 0x62fe2e4099191b10 7-X3 presentation
619 # URL: http://www.checkfilename.com/view-details/WordPerfect-Office-X3/RespageIndex/0/sTab/2/
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
HDAArch64MCTargetDesc.cpp110 {codeview::RegisterId::ARM64_X3, AArch64::X3}, in initLLVMToCVRegMapping()

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