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Searched refs:WR1 (Results 1 – 14 of 14) sorted by relevance

/freebsd-13-stable/sys/dev/hdmi/
HDdwc_hdmi.c95 WR1(sc, HDMI_IH_I2CMPHY_STAT0, in dwc_hdmi_phy_i2c_write()
97 WR1(sc, HDMI_PHY_I2CM_ADDRESS_ADDR, addr); in dwc_hdmi_phy_i2c_write()
98 WR1(sc, HDMI_PHY_I2CM_DATAO_1_ADDR, ((data >> 8) & 0xff)); in dwc_hdmi_phy_i2c_write()
99 WR1(sc, HDMI_PHY_I2CM_DATAO_0_ADDR, ((data >> 0) & 0xff)); in dwc_hdmi_phy_i2c_write()
100 WR1(sc, HDMI_PHY_I2CM_OPERATION_ADDR, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE); in dwc_hdmi_phy_i2c_write()
107 WR1(sc, HDMI_IH_MUTE_FC_STAT2, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK); in dwc_hdmi_disable_overflow_interrupts()
108 WR1(sc, HDMI_FC_MASK2, in dwc_hdmi_disable_overflow_interrupts()
144 WR1(sc, HDMI_FC_INVIDCONF, inv_val); in dwc_hdmi_av_composer()
147 WR1(sc, HDMI_FC_INHACTV1, sc->sc_mode.hdisplay >> 8); in dwc_hdmi_av_composer()
148 WR1(sc, HDMI_FC_INHACTV0, sc->sc_mode.hdisplay); in dwc_hdmi_av_composer()
[all …]
HDdwc_hdmi.h52 WR1(struct dwc_hdmi_softc *sc, bus_size_t off, uint8_t val) in WR1() function
/freebsd-13-stable/sys/arm64/nvidia/tegra210/
HDmax77620_gpio.c260 rv = WR1(sc, pin->reg, reg); in max77620_pinmux_config_node()
358 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue); in max77620_pinmux_configure()
367 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde); in max77620_pinmux_configure()
376 rv = WR1(sc, MAX77620_REG_AME_GPIO, sc->gpio_reg_ame); in max77620_pinmux_configure()
561 rv = WR1(sc, pin->reg, reg); in max77620_gpio_pin_setflags()
567 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue); in max77620_gpio_pin_setflags()
577 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde); in max77620_gpio_pin_setflags()
HDmax77620.h225 #define WR1(sc, reg, val) max77620_write(sc, reg, val) macro
/freebsd-13-stable/sys/arm/nvidia/
HDas3722.c233 rv = WR1(sc, AS3722_INTERRUPT_MASK1, 0); in as3722_init()
236 rv = WR1(sc, AS3722_INTERRUPT_MASK2, 0); in as3722_init()
239 rv = WR1(sc, AS3722_INTERRUPT_MASK3, 0); in as3722_init()
242 rv = WR1(sc, AS3722_INTERRUPT_MASK4, 0); in as3722_init()
HDas3722_gpio.c198 rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl); in as3722_pinmux_config_node()
447 rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl); in as3722_gpio_pin_setflags()
HDas3722.h284 #define WR1(sc, reg, val) as3722_write(sc, reg, val) macro
/freebsd-13-stable/sys/dev/tpm/
HDtpm20.h159 WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val) in WR1() function
180 WR1(sc, off, RD1(sc, off) | val); in OR1()
HDtpm_tis.c199 WR1(sc, TPM_INT_VECTOR, channel); in tpmtis_get_SIRQ_channel()
326 WR1(sc, TPM_DATA_FIFO, *buf++); in tpmtis_write_bytes()
346 WR1(sc, TPM_ACCESS, TPM_ACCESS_LOC_REQ); in tpmtis_request_locality()
/freebsd-13-stable/sys/dev/iicbus/pmic/
HDact8846.h48 #define WR1(sc, reg, val) act8846_write(sc, reg, val) macro
/freebsd-13-stable/sys/dev/sdhci/
HDsdhci.c87 #define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val)) macro
264 WR1(slot, SDHCI_SOFTWARE_RESET, mask); in sdhci_reset()
450 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
468 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
476 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
485 WR1(slot, SDHCI_POWER_CONTROL, pwr | 0x10); in sdhci_set_power()
487 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
1272 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
1833 WR1(slot, SDHCI_TIMEOUT_CONTROL, div);
2066 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl |= SDHCI_CTRL_LED);
[all …]
/freebsd-13-stable/sys/arm/broadcom/bcm2835/
HDbcm2835_sdhost.c283 WR1(struct bcm_sdhost_softc *sc, bus_size_t off, uint8_t val) in WR1() function
1056 WR1(sc, HC_POWER, val2); in bcm_sdhost_write_1()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
HDHexagonDisassembler.cpp627 Hexagon::W0, Hexagon::WR0, Hexagon::W1, Hexagon::WR1, Hexagon::W2, in DecodeHvxWRRegisterClass()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonRegisterInfo.td253 def WR1 : Rd< 3, "v2:3", [V2, V3, VFR1]>, DwarfRegNum<[162]>;