1 /*
2 * Copyright (c) 2017-2018 Cavium, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #ifndef __BCM_OSAL_ECORE_PACKAGE
29 #define __BCM_OSAL_ECORE_PACKAGE
30
31 #include "qlnx_os.h"
32 #include "ecore_status.h"
33 #include <sys/bitstring.h>
34
35 #include <linux/types.h>
36
37 #if __FreeBSD_version >= 1200032
38 #include <linux/bitmap.h>
39 #else
40 #if __FreeBSD_version >= 1100090
41 #include <compat/linuxkpi/common/include/linux/bitops.h>
42 #else
43 #include <ofed/include/linux/bitops.h>
44 #endif
45 #endif
46
47 #define OSAL_NUM_CPUS() mp_ncpus
48 /*
49 * prototypes of freebsd specific functions required by ecore
50 */
51 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id);
52 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg,
53 uint8_t *reg_value);
54 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg,
55 uint16_t *reg_value);
56 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg,
57 uint32_t *reg_value);
58 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg,
59 uint8_t reg_value);
60 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg,
61 uint16_t reg_value);
62 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg,
63 uint32_t reg_value);
64 extern int qlnx_pci_find_capability(void *ecore_dev, int cap);
65 extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap);
66
67 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr);
68 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value);
69 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value);
70
71 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr);
72 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
73 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value);
74
75 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
76 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value);
77
78 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys,
79 uint32_t size);
80 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr,
81 bus_addr_t phys, uint32_t size);
82
83 extern void qlnx_link_update(void *p_hwfn);
84 extern void qlnx_barrier(void *p_dev);
85
86 extern void *qlnx_zalloc(uint32_t size);
87
88 extern void qlnx_get_protocol_stats(void *cdev, int proto_type,
89 void *proto_stats);
90
91 extern void qlnx_sp_isr(void *arg);
92
93 extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req,
94 void *p_sw_info);
95 extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id);
96 extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params);
97 extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params,
98 uint16_t *tlvs);
99 extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id);
100 extern void qlnx_vf_flr_update(void *p_hwfn);
101
102 #define nothing do {} while(0)
103 #ifdef ECORE_PACKAGE
104
105 /* Memory Types */
106 #define u8 uint8_t
107 #define u16 uint16_t
108 #define u32 uint32_t
109 #define u64 uint64_t
110 #define s16 uint16_t
111 #define s32 uint32_t
112
113 #ifndef QLNX_RDMA
114
115 static __inline unsigned long
roundup_pow_of_two(unsigned long x)116 roundup_pow_of_two(unsigned long x)
117 {
118 return (1UL << flsl(x - 1));
119 }
120
121 static __inline int
is_power_of_2(unsigned long n)122 is_power_of_2(unsigned long n)
123 {
124 return (n == roundup_pow_of_two(n));
125 }
126
127 static __inline unsigned long
rounddown_pow_of_two(unsigned long x)128 rounddown_pow_of_two(unsigned long x)
129 {
130 return (1UL << (flsl(x) - 1));
131 }
132
133 #define max_t(type, val1, val2) \
134 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2))
135 #define min_t(type, val1, val2) \
136 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2))
137
138 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
139 #define BUILD_BUG_ON(cond) nothing
140
141 #endif /* #ifndef QLNX_RDMA */
142
143 #define OSAL_UNUSED
144
145 #define OSAL_CPU_TO_BE64(val) htobe64(val)
146 #define OSAL_BE64_TO_CPU(val) be64toh(val)
147
148 #define OSAL_CPU_TO_BE32(val) htobe32(val)
149 #define OSAL_BE32_TO_CPU(val) be32toh(val)
150
151 #define OSAL_CPU_TO_LE32(val) htole32(val)
152 #define OSAL_LE32_TO_CPU(val) le32toh(val)
153
154 #define OSAL_CPU_TO_BE16(val) htobe16(val)
155 #define OSAL_BE16_TO_CPU(val) be16toh(val)
156
157 #define OSAL_CPU_TO_LE16(val) htole16(val)
158 #define OSAL_LE16_TO_CPU(val) le16toh(val)
159
160 static __inline uint32_t
qlnx_get_cache_line_size(void)161 qlnx_get_cache_line_size(void)
162 {
163 return (CACHE_LINE_SIZE);
164 }
165
166 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size()
167
168 #define OSAL_BE32 uint32_t
169 #define dma_addr_t bus_addr_t
170 #define osal_size_t size_t
171
172 typedef struct mtx osal_spinlock_t;
173 typedef struct mtx osal_mutex_t;
174
175 typedef void * osal_dpc_t;
176
177 typedef struct _osal_list_entry_t
178 {
179 struct _osal_list_entry_t *next, *prev;
180 } osal_list_entry_t;
181
182 typedef struct osal_list_t
183 {
184 osal_list_entry_t *head, *tail;
185 unsigned long cnt;
186 } osal_list_t;
187
188 /* OSAL functions */
189
190 #define OSAL_UDELAY(time) DELAY(time)
191 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time)
192
193 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size)
194 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size)
195 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size)
196 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size)
197
198 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF)
199 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF)
200
201 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size)
202
203 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size)
204
205 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \
206 qlnx_dma_alloc_coherent(dev, phys, size)
207
208 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \
209 qlnx_dma_free_coherent(dev, virt, phys, size)
210 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
211
212 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val)
213 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val)
214 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value)
215 #define DIRECT_REG_WR64(p_hwfn, addr, value) \
216 qlnx_direct_reg_wr64(p_hwfn, addr, value)
217 #define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value)
218 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr)
219 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr)
220 #define DOORBELL(hwfn, addr, value) \
221 qlnx_dbell_wr32(hwfn, addr, value)
222
223 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex)
224 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex)
225 #define OSAL_SPIN_LOCK_INIT(lock) {\
226 mtx_init(lock, __func__, "OSAL spin lock", MTX_SPIN); \
227 }
228
229 #define OSAL_SPIN_UNLOCK(lock) {\
230 mtx_unlock_spin(lock); \
231 }
232 #define OSAL_SPIN_LOCK(lock) {\
233 mtx_lock_spin(lock); \
234 }
235
236 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex)
237 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex)
238 #define OSAL_MUTEX_INIT(lock) {\
239 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\
240 }
241
242 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock)
243 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock)
244
245 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT)
246 #define OSAL_DPC_INIT(dpc, hwfn) nothing
247 extern void qlnx_schedule_recovery(void *p_hwfn);
248 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0)
249 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing
250 #define OSAL_DPC_SYNC(hwfn) nothing
251
OSAL_DCBX_AEN(void * p_hwfn,u32 mib_type)252 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type)
253 {
254 return;
255 }
256
OSAL_NVM_IS_ACCESS_ENABLED(void * p_hwfn)257 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
258 {
259 return 1;
260 }
261
262 #define OSAL_LIST_INIT(list) \
263 do { \
264 (list)->head = NULL; \
265 (list)->tail = NULL; \
266 (list)->cnt = 0; \
267 } while (0)
268
269 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \
270 do { \
271 (entry)->prev = (entry_prev); \
272 (entry)->next = (entry_prev)->next; \
273 (entry)->next->prev = (entry); \
274 (entry_prev)->next = (entry); \
275 (list)->cnt++; \
276 } while (0);
277
278 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \
279 do { \
280 ((new_list)->tail)->next = ((list)->head); \
281 ((list)->head)->prev = ((new_list)->tail); \
282 (list)->head = (new_list)->head; \
283 (list)->cnt = (list)->cnt + (new_list)->cnt; \
284 OSAL_LIST_INIT(new_list); \
285 } while (0);
286
287 #define OSAL_LIST_PUSH_HEAD(entry, list) \
288 do { \
289 (entry)->prev = (osal_list_entry_t *)0; \
290 (entry)->next = (list)->head; \
291 if ((list)->tail == (osal_list_entry_t *)0) { \
292 (list)->tail = (entry); \
293 } else { \
294 (list)->head->prev = (entry); \
295 } \
296 (list)->head = (entry); \
297 (list)->cnt++; \
298 } while (0)
299
300 #define OSAL_LIST_PUSH_TAIL(entry, list) \
301 do { \
302 (entry)->next = (osal_list_entry_t *)0; \
303 (entry)->prev = (list)->tail; \
304 if ((list)->tail) { \
305 (list)->tail->next = (entry); \
306 } else { \
307 (list)->head = (entry); \
308 } \
309 (list)->tail = (entry); \
310 (list)->cnt++; \
311 } while (0)
312
313 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \
314 (type *)((list)->head)
315
316 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \
317 do { \
318 if ((list)->head == (entry)) { \
319 if ((list)->head) { \
320 (list)->head = (list)->head->next; \
321 if ((list)->head) { \
322 (list)->head->prev = (osal_list_entry_t *)0; \
323 } else { \
324 (list)->tail = (osal_list_entry_t *)0; \
325 } \
326 (list)->cnt--; \
327 } \
328 } else if ((list)->tail == (entry)) { \
329 if ((list)->tail) { \
330 (list)->tail = (list)->tail->prev; \
331 if ((list)->tail) { \
332 (list)->tail->next = (osal_list_entry_t *)0; \
333 } else { \
334 (list)->head = (osal_list_entry_t *)0; \
335 } \
336 (list)->cnt--; \
337 } \
338 } else { \
339 (entry)->prev->next = (entry)->next; \
340 (entry)->next->prev = (entry)->prev; \
341 (list)->cnt--; \
342 } \
343 } while (0)
344
345 #define OSAL_LIST_IS_EMPTY(list) \
346 ((list)->cnt == 0)
347
348 #define OSAL_LIST_NEXT(entry, field, type) \
349 (type *)((&((entry)->field))->next)
350
351 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \
352 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \
353 entry; \
354 entry = OSAL_LIST_NEXT(entry, field, type))
355
356 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \
357 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \
358 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \
359 entry != NULL; \
360 entry = (type *)tmp_entry, \
361 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL)
362
363 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id)
364
365 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \
366 qlnx_pci_read_config_byte(dev, reg, value);
367 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \
368 qlnx_pci_read_config_word(dev, reg, value);
369 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \
370 qlnx_pci_read_config_dword(dev, reg, value);
371
372 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \
373 qlnx_pci_write_config_byte(dev, reg, value);
374 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \
375 qlnx_pci_write_config_word(dev, reg, value);
376 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \
377 qlnx_pci_write_config_dword(dev, reg, value);
378
379 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap)
380 #define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \
381 qlnx_pci_find_ext_capability(dev, ext_cap)
382
383 #define OSAL_MMIOWB(dev) qlnx_barrier(dev)
384 #define OSAL_BARRIER(dev) qlnx_barrier(dev)
385
386 #define OSAL_SMP_MB(dev) mb()
387 #define OSAL_SMP_RMB(dev) rmb()
388 #define OSAL_SMP_WMB(dev) wmb()
389 #define OSAL_RMB(dev) rmb()
390 #define OSAL_WMB(dev) wmb()
391 #define OSAL_DMA_SYNC(dev, addr, length, is_post)
392
393 #define OSAL_FIND_FIRST_BIT find_first_bit
394 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit)
395 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit)
396 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit)
397 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \
398 find_first_zero_bit(bitmap, length)
399
400 #define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn)
401
402 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
403 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
404
405 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus
406
407 #ifndef DIV_ROUND_UP
408 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what))
409 #endif
410
411 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what))
412
413 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val))
414
415 static __inline uint32_t
qlnx_log2(uint32_t x)416 qlnx_log2(uint32_t x)
417 {
418 uint32_t log = 0;
419
420 while (x >>= 1) log++;
421
422 return (log);
423 }
424
425 #define OSAL_LOG2(val) qlnx_log2(val)
426 #define OFFSETOF(str, field) offsetof(str, field)
427 #define PRINT device_printf
428 #define PRINT_ERR device_printf
429 #define OSAL_ASSERT(is_assert) nothing
430 #define OSAL_BEFORE_PF_START(cdev, my_id) {};
431 #define OSAL_AFTER_PF_STOP(cdev, my_id) {};
432
433 #define INLINE __inline
434 #define OSAL_INLINE __inline
435 #define OSAL_UNLIKELY
436 #define OSAL_NULL NULL
437
438 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2)
439 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2)
440
441 #define __iomem
442 #define OSAL_IOMEM
443
444 #define int_ptr_t void *
445 #define osal_int_ptr_t void *
446 #define OSAL_BUILD_BUG_ON(cond) nothing
447 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
448 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
449
450 #define OSAL_PAGE_SIZE PAGE_SIZE
451
452 #define OSAL_STRCPY(dst, src) strcpy(dst, src)
453 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes)
454 #define OSAL_STRLEN(src) strlen(src)
455 #define OSAL_SPRINTF sprintf
456 #define OSAL_SNPRINTF snprintf
457 #define OSAL_MEMSET memset
458 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
459 #define osal_uintptr_t u64
460
461 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0)
462 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \
463 qlnx_get_protocol_stats(p_hwfn, type, stats);
464 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);}
465 #define OSAL_WARN(cond, fmt, args...) \
466 if (cond) printf("%s: WARNING: " fmt, __func__, ## args);
467
468 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits)
469 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id)
470
471 static inline int
qlnx_test_and_change_bit(long bit,volatile unsigned long * var)472 qlnx_test_and_change_bit(long bit, volatile unsigned long *var)
473 {
474 long val;
475
476 var += BIT_WORD(bit);
477 bit %= BITS_PER_LONG;
478 bit = (1UL << bit);
479
480 val = *var;
481
482 #if __FreeBSD_version >= 1100000
483 if (val & bit)
484 return (test_and_clear_bit(bit, var));
485
486 return (test_and_set_bit(bit, var));
487 #else
488 if (val & bit)
489 return (test_and_clear_bit(bit, (long *)var));
490
491 return (test_and_set_bit(bit, (long *)var));
492
493 #endif
494 }
495
496 #if __FreeBSD_version < 1100000
497 static inline unsigned
bitmap_weight(unsigned long * bitmap,unsigned nbits)498 bitmap_weight(unsigned long *bitmap, unsigned nbits)
499 {
500 unsigned bit;
501 unsigned retval = 0;
502
503 for_each_set_bit(bit, bitmap, nbits)
504 retval++;
505 return (retval);
506 }
507
508 #endif
509
510 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit
511 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit
512 #define OSAL_MEMCMP memcmp
513 #define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);}
514 #define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);}
515
516 static inline u32
OSAL_CRC32(u32 crc,u8 * ptr,u32 length)517 OSAL_CRC32(u32 crc, u8 *ptr, u32 length)
518 {
519 int i;
520
521 while (length--) {
522 crc ^= *ptr++;
523 for (i = 0; i < 8; i++)
524 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
525 }
526 return crc;
527 }
528
529 static inline void
OSAL_CRC8_POPULATE(u8 * cdu_crc8_table,u8 polynomial)530 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial)
531 {
532 return;
533 }
534
535 static inline u8
OSAL_CRC8(u8 * cdu_crc8_table,u8 * data_to_crc,int data_to_crc_len,u8 init_value)536 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value)
537 {
538 return ECORE_NOTIMPL;
539 }
540
541 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset)
542 #define OSAL_MFW_TLV_REQ(p_hwfn)
543 #define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len)
544 #define OSAL_MFW_CMD_PREEMPT(p_hwfn)
545 #define OSAL_TRANSCEIVER_UPDATE(p_hwfn)
546 #define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0)
547
548 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
549
550 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \
551 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info)
552
553 #define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status)
554 #define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \
555 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id)
556
557 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS
558 #define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD
559 #define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS
560 #define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid)
561 #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS
562 #define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \
563 qlnx_iov_chk_ucast(p_hwfn, vfid, params);
564 #define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id)
565 #define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type)
566 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \
567 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs)
568 #define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \
569 qlnx_pf_vf_msg(p_hwfn, relative_vf_id)
570
571 #define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn)
572 #define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf)
573
574 #endif /* #ifdef ECORE_PACKAGE */
575
576 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */
577