Searched refs:Lt0 (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUISelLowering.cpp | 2380 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL() local
2382 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc); in LowerFCEIL()
2541 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOLT); in LowerFFLOOR() local
2543 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc); in LowerFFLOOR()
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| HD | AMDGPULegalizerInfo.cpp | 2465 auto Lt0 = B.buildFCmp(CmpInst::FCMP_OGT, S1, Src, Zero); in legalizeFceil() local
2467 auto And = B.buildAnd(S1, Lt0, NeTrunc); in legalizeFceil()
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | LegalizerHelper.cpp | 7436 auto Lt0 = MIRBuilder.buildFCmp(CmpInst::FCMP_OLT, CondTy, in lowerFFloor() local
7440 auto And = MIRBuilder.buildAnd(CondTy, Lt0, NeTrunc); in lowerFFloor()
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