Home
last modified time | relevance | path

Searched refs:D15 (Results 1 – 25 of 42) sorted by relevance

12

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
HDHexagonDisassembler.cpp220 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
228 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
236 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
244 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
252 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
260 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
268 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
276 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
607 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15}; in DecodeDoubleRegsRegisterClass()
/freebsd-13-stable/lib/msun/ld128/
HDs_expl.c195 D15 = 7.6478532249581686e-13, /* 0x1.ae892e3D16fcep-41 */ variable
253 dx * (D14 + dx * (D15 + dx * (D16 + in expm1l()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMBaseRegisterInfo.h105 case D15: case D14: case D13: case D12: in isARMArea3Register()
HDARMRegisterInfo.td136 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
166 def Q7 : ARMReg< 7, "q7", [D14, D15]>;
HDARMExpandPseudoInsts.cpp1222 (Reg >= ARM::D0 && Reg <= ARM::D15) || in determineFPRegsToClear()
1231 } else if (Reg >= ARM::D0 && Reg <= ARM::D15) { in determineFPRegsToClear()
1755 (Reg >= ARM::D0 && Reg <= ARM::D15) || in definesOrUsesFPReg()
HDARMInstrVFP.td328 …s = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15];
338 … FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
347 …s = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15];
358 … FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
HDAArch64BaseInfo.h146 case AArch64::D15: return AArch64::B15; in getBRegFromDReg()
186 case AArch64::B15: return AArch64::D15; in getDRegFromBReg()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonFrameLowering.cpp251 if (Reg < Hexagon::D0 || Reg > Hexagon::D15) in getMax32BitSubRegister()
801 .addDef(Hexagon::D15) in insertEpilogueInBlock()
851 .addDef(Hexagon::D15) in insertEpilogueInBlock()
857 .addDef(Hexagon::D15) in insertEpilogueInBlock()
878 .addDef(Hexagon::D15) in insertEpilogueInBlock()
1115 if (Reg < Hexagon::D0 || Reg > Hexagon::D15) { in insertCFIInstructionsAt()
HDHexagonDepMappings.td85 def L4_return_map_to_raw_fAlias : InstAlias<"if (!$Pv4) dealloc_return", (L4_return_f D15, PredRegs…
86 …tAlias : InstAlias<"if (!$Pv4.new) dealloc_return:nt", (L4_return_fnew_pnt D15, PredRegs:$Pv4, R30…
87 …_ptAlias : InstAlias<"if (!$Pv4.new) dealloc_return:t", (L4_return_fnew_pt D15, PredRegs:$Pv4, R30…
88 def L4_return_map_to_raw_tAlias : InstAlias<"if ($Pv4) dealloc_return", (L4_return_t D15, PredRegs:…
89 …ntAlias : InstAlias<"if ($Pv4.new) dealloc_return:nt", (L4_return_tnew_pnt D15, PredRegs:$Pv4, R30…
90 …w_ptAlias : InstAlias<"if ($Pv4.new) dealloc_return:t", (L4_return_tnew_pt D15, PredRegs:$Pv4, R30…
94 def L6_deallocframe_map_to_rawAlias : InstAlias<"deallocframe", (L2_deallocframe D15, R30)>;
95 def L6_return_map_to_rawAlias : InstAlias<"dealloc_return", (L4_return D15, R30)>;
HDHexagonRegisterInfo.td152 def D15 : Rd<30, "r31:30", [R30, R31], ["lr:fp"]>, DwarfRegNum<[62]>;
546 (add (sequence "D%u", 0, 4), (sequence "D%u", 6, 13), D5, D14, D15)>;
HDHexagonISelLowering.cpp319 .Case("r31:30", Hexagon::D15) in getRegisterByName()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64PBQPRegAlloc.cpp63 case AArch64::D15: in isOdd()
HDAArch64CallingConvention.td493 CCIfType<[f64], CCAssignToReg<[D12, D13, D14, D15]>>,
561 D12, D13, D14, D15)>;
573 D12, D13, D14, D15)>;
682 D12, D13, D14, D15)>;
HDAArch64RegisterInfo.td398 def D15 : AArch64Reg<15, "d15", [S15], ["v15", ""]>, DwarfRegAlias<B15>;
433 def Q15 : AArch64Reg<15, "q15", [D15], ["v15", ""]>, DwarfRegAlias<B15>;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
HDSparcRegisterInfo.td225 def D15 : Rd<30, "f30", [F30, F31]>, DwarfRegNum<[87]>;
288 def Q7 : Rq<28, "f28", [D14, D15]>;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
HDSparcDisassembler.cpp88 SP::D14, SP::D30, SP::D15, SP::D31 };
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
HDAArch64AsmBackend.cpp732 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15) in generateCompactUnwindEncoding()
HDAArch64MCTargetDesc.cpp188 {codeview::RegisterId::ARM64_D15, AArch64::D15}, in initLLVMToCVRegMapping()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
HDARMMCTargetDesc.cpp295 {codeview::RegisterId::ARM_ND15, ARM::D15}, in initLLVMToCVRegMapping()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsRegisterInfo.td411 D10, D11, D12, D13, D14, D15)>;
/freebsd-13-stable/sys/contrib/edk2/Include/Library/
HDBaseLib.h123 UINT64 D15; member
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
HDSparcAsmParser.cpp173 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15,
/freebsd-13-stable/sys/contrib/device-tree/src/arm/
HDsama5d4.dtsi897 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp7429 if (parseRegisterInRange(Reg, AArch64::D0, AArch64::D8, AArch64::D15) || in parseDirectiveSEHSaveFReg()
7441 if (parseRegisterInRange(Reg, AArch64::D0, AArch64::D8, AArch64::D15) || in parseDirectiveSEHSaveFRegX()
/freebsd-13-stable/share/ctypedef/
HDja_JP.eucJP.src3041 <CJK_UNIFIED_IDEOGRAPH-5D15>;/
7945 <CJK_UNIFIED_IDEOGRAPH-7D15>;/
12475 <CJK_UNIFIED_IDEOGRAPH-9D15>;/
16088 <CJK_UNIFIED_IDEOGRAPH-5D15>;/
20992 <CJK_UNIFIED_IDEOGRAPH-7D15>;/
25522 <CJK_UNIFIED_IDEOGRAPH-9D15>;/
29193 <CJK_UNIFIED_IDEOGRAPH-5D15>;/
34097 <CJK_UNIFIED_IDEOGRAPH-7D15>;/
38627 <CJK_UNIFIED_IDEOGRAPH-9D15>;/

12