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Searched refs:COND_EQ (Results 1 – 16 of 16) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
HDARMDefines.h33 #define COND_EQ \ macro
73 case COND_EQ: in ARMCondCodeToString()
115 case COND_EQ: in ARMConditionPassed()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/M68k/
HDM68kInstrInfo.h42 COND_EQ = 7, // Equal enumerator
75 return M68k::COND_EQ; in GetOppositeBranchCondition()
76 case M68k::COND_EQ: in GetOppositeBranchCondition()
101 case M68k::COND_EQ: in GetCondBranchFromCond()
137 return M68k::COND_EQ; in GetCondFromBranchOpc()
HDM68kISelLowering.cpp1669 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1728 return M68k::COND_EQ; in TranslateIntegerM68kCC()
1807 return M68k::COND_EQ; in TranslateM68kCC()
1955 if ((M68kCC == M68k::COND_EQ || M68kCC == M68k::COND_NE) && in EmitTest()
2087 case M68k::COND_EQ: in isM68kCCUnsigned()
2285 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2314 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_EQ)) in LowerSELECT()
2599 M68k::CondCode MxCond = Inverted ? M68k::COND_EQ : M68k::COND_NE; in LowerBRCOND()
HDM68kInstrInfo.cpp53 return M68k::COND_EQ; in getCondFromBranchOpc()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
HDAVRInstrInfo.cpp199 case AVRCC::COND_EQ: in getBrCond()
223 return AVRCC::COND_EQ; in getCondFromBranchOpc()
245 case AVRCC::COND_EQ: in getOppositeCondition()
248 return AVRCC::COND_EQ; in getOppositeCondition()
HDAVRInstrInfo.h34 COND_EQ, //!< Equal enumerator
HDAVRISelLowering.cpp621 return AVRCC::COND_EQ; in intCCToAVRCC()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVRedundantCopyElimination.cpp80 if (CC == RISCVCC::COND_EQ && Cond[2].isReg() && in guaranteesZeroRegInBlock()
HDRISCVISelDAGToDAG.h174 return RISCVCC::COND_EQ; in getRISCVCCForIntCC()
HDRISCVInstrInfo.h38 COND_EQ, enumerator
HDRISCVInstrInfo.cpp850 return RISCVCC::COND_EQ; in getCondFromBranchOpc()
854 return RISCVCC::COND_EQ; in getCondFromBranchOpc()
887 case RISCVCC::COND_EQ: in getBrCond()
911 case RISCVCC::COND_EQ: in getOppositeBranchCondition()
914 return RISCVCC::COND_EQ; in getOppositeBranchCondition()
1156 if (CC == RISCVCC::COND_EQ || CC == RISCVCC::COND_NE) in optimizeCondBranch()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDVOPCInstructions.td667 defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
732 defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
750 defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
1015 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
1026 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
1038 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_t16_e64, i16>;
1051 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;
HDAMDGPUInstructions.td385 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
HDSOPInstructions.td1341 def S_CMP_EQ_U32 : SOPC_CMP_32 <"s_cmp_eq_u32", COND_EQ>;
1356 def S_CMP_EQ_U64 : SOPC_CMP_64 <"s_cmp_eq_u64", COND_EQ>;
HDR600Instructions.td895 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_EQ))]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
HDRISCVInstructionSelector.cpp430 return RISCVCC::COND_EQ; in getRISCVCCFromICmp()