| /freebsd-13-stable/sys/contrib/libsodium/packaging/nuget/ |
| HD | package.gsl | 139 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
144 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
149 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
154 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
161 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
166 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
171 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
176 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
183 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
188 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
[all …]
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | SIOptimizeExecMaskingPreRA.cpp | 92 const MachineInstr &Sel, const MachineInstr &And) { in isDefBetween() argument
93 SlotIndex AndIdx = LIS->getInstructionIndex(And).getRegSlot(); in isDefBetween()
131 auto *And = in optimizeVcndVcmpPair() local
133 if (!And || And->getOpcode() != AndOpc || in optimizeVcndVcmpPair()
134 !And->getOperand(1).isReg() || !And->getOperand(2).isReg()) in optimizeVcndVcmpPair()
137 MachineOperand *AndCC = &And->getOperand(1); in optimizeVcndVcmpPair()
141 AndCC = &And->getOperand(2); in optimizeVcndVcmpPair()
144 } else if (And->getOperand(2).getReg() != Register(ExecReg)) { in optimizeVcndVcmpPair()
148 auto *Cmp = TRI->findReachingDef(CmpReg, CmpSubReg, *And, *MRI, LIS); in optimizeVcndVcmpPair()
151 Cmp->getParent() != And->getParent()) in optimizeVcndVcmpPair()
[all …]
|
| HD | SILowerControlFlow.cpp | 242 MachineInstr *And = in emitIf() local
247 LV->replaceKillInstruction(Cond.getReg(), MI, *And); in emitIf()
249 setImpSCCDefDead(*And, true); in emitIf()
286 LIS->ReplaceMachineInstrInMaps(MI, *And); in emitIf()
329 MachineInstr *And = BuildMI(MBB, ElsePt, DL, TII->get(AndOpc), DstReg) in emitElse() local
355 LIS->InsertMachineInstrInMaps(*And); in emitElse()
387 MachineInstr *And = nullptr, *Or = nullptr; in emitIfBreak() local
391 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg) in emitIfBreak()
395 LV->replaceKillInstruction(MI.getOperand(1).getReg(), MI, *And); in emitIfBreak()
411 if (And) { in emitIfBreak()
[all …]
|
| /freebsd-13-stable/tests/sys/geom/class/uzip/etalon/ |
| HD | etalon.txt | 12 And the mome raths outgrabe.
22 And stood awhile in thought.
24 And, as in uffish thought he stood,
27 And burbled as it came!
29 One, two! One, two! And through and through
34 "And, has thou slain the Jabberwock?
42 And the mome raths outgrabe.
|
| /freebsd-13-stable/contrib/llvm-project/clang/lib/Analysis/ |
| HD | ThreadSafetyLogical.cpp | 44 case LExpr::And: in implies()
49 return RNeg ? RightOrOperator(cast<And>(RHS)) in implies()
50 : RightAndOperator(cast<And>(RHS)); in implies()
69 case LExpr::And: in implies()
74 return LNeg ? LeftAndOperator(cast<And>(LHS)) in implies()
75 : LeftOrOperator(cast<And>(LHS)); in implies()
|
| /freebsd-13-stable/contrib/llvm-project/clang/include/clang/Analysis/Analyses/ |
| HD | ThreadSafetyLogical.h | 25 And, enumerator
68 class And : public BinOp {
70 And(LExpr *LHS, LExpr *RHS) : BinOp(LHS, RHS, LExpr::And) {} in And() function
72 static bool classof(const LExpr *E) { return E->kind() == LExpr::And; } in classof()
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| HD | GuardUtils.cpp | 96 auto *And = dyn_cast<Instruction>(Cond); in parseWidenableBranch() local
97 if (!And) in parseWidenableBranch()
103 WC = &And->getOperandUse(0); in parseWidenableBranch()
104 C = &And->getOperandUse(1); in parseWidenableBranch()
110 WC = &And->getOperandUse(1); in parseWidenableBranch()
111 C = &And->getOperandUse(0); in parseWidenableBranch()
|
| /freebsd-13-stable/usr.bin/diff/tests/ |
| HD | unified_p.out | 7 - * And another bla
8 + * And another bla
10 - * And yet another
|
| HD | unified_9999.out | 7 - * And another bla
8 + * And another bla
10 - * And yet another
|
| HD | group-format.out | 5 * And another bla
7 * And another bla
11 * And yet another
|
| HD | simple_p.out | 8 ! * And another bla
10 ! * And yet another
23 ! * And another bla
|
| HD | unified_c9999.out | 8 ! * And another bla
10 ! * And yet another
24 ! * And another bla
|
| HD | ifdef.out | 5 * And another bla
7 * And another bla
11 * And yet another
|
| HD | simple_i.out | 2 < * And another bla
4 > * And another bla
|
| HD | input_c1.in | 4 * And another bla
6 * And yet another
|
| /freebsd-13-stable/contrib/kyua/doc/ |
| HD | manbuild_test.sh | 59 And nothing more.
65 And nothing more.
76 And nothing more.
82 And nothing more.
119 And done!
135 And done!
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86InstCombineIntrinsic.cpp | 692 auto And = [&](auto Lhs, auto Rhs) -> std::pair<Value *, uint8_t> { in simplifyTernarylogic() local
700 auto Nand = [&](auto Lhs, auto Rhs) { return Not(And(Lhs, Rhs)); }; in simplifyTernarylogic()
736 Res = And(Nor(A, B), C); in simplifyTernarylogic()
744 Res = And(Nor(A, C), B); in simplifyTernarylogic()
756 Res = Nor(A, And(B, C)); in simplifyTernarylogic()
791 Res = And(A, Nor(B, C)); in simplifyTernarylogic()
803 Res = Nor(And(A, C), B); in simplifyTernarylogic()
811 Res = Nor(And(A, B), C); in simplifyTernarylogic()
815 Res = Xor(Xor(A, B), And(Nand(A, B), C)); in simplifyTernarylogic()
827 Res = And(Nand(A, B), Xnor(B, C)); in simplifyTernarylogic()
[all …]
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| /freebsd-13-stable/sys/contrib/dev/rtw88fw/ |
| HD | README | 6 driver rtw88. And some of the devices run with more than one firmware
9 And another is called "wowlan" firmware, it should be loaded when a
17 _only_ pick the normal firmware. And everything still works fine,
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| HD | HexagonPatternsHVX.td | 393 def: OpR_RR_pat<V6_vand, And, VecI8, HVI8>;
394 def: OpR_RR_pat<V6_vand, And, VecI16, HVI16>;
395 def: OpR_RR_pat<V6_vand, And, VecI32, HVI32>;
797 def: OpR_RR_pat<V6_pred_and, And, VecQ8, HQ8>;
798 def: OpR_RR_pat<V6_pred_and, And, VecQ16, HQ16>;
799 def: OpR_RR_pat<V6_pred_and, And, VecQ32, HQ32>;
807 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ8, HQ8>;
808 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ16, HQ16>;
809 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ32, HQ32>;
824 def: AccRRR_pat<V6_veqb_and, And, seteq, HQ8, HVI8, HVI8>;
[all …]
|
| /freebsd-13-stable/contrib/llvm-project/clang/include/clang/Analysis/FlowSensitive/ |
| HD | Formula.h | 61 And, /// True if LHS and RHS are both true in alignas() enumerator
110 case And: in alignas()
|
| /freebsd-13-stable/sys/contrib/device-tree/Bindings/clock/ |
| D | nvidia,tegra210-car.txt | 1 NVIDIA Tegra210 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra20-car.txt | 1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra114-car.txt | 1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineCompares.cpp | 209 Elt = ConstantFoldBinaryOpOperands(Instruction::And, Elt, AndCst, DL); in foldCmpLoadFromIndexedGlobal()
1458 Value *And = Builder.CreateAnd(X, Mask); in foldICmpTruncConstant() local
1460 return new ICmpInst(Pred, And, WideC); in foldICmpTruncConstant()
1658 BinaryOperator *And, in foldICmpAndShift() argument
1661 BinaryOperator *Shift = dyn_cast<BinaryOperator>(And->getOperand(0)); in foldICmpAndShift()
1718 Shift->getOperand(0), ConstantInt::get(And->getType(), NewAndCst)); in foldICmpAndShift()
1720 NewAnd, ConstantInt::get(And->getType(), NewCmpCst)); in foldICmpAndShift()
1731 IsShl ? Builder.CreateLShr(And->getOperand(1), Shift->getOperand(1)) in foldICmpAndShift()
1732 : Builder.CreateShl(And->getOperand(1), Shift->getOperand(1)); in foldICmpAndShift()
1744 BinaryOperator *And, in foldICmpAndConstConst() argument
[all …]
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| HD | InstCombineAtomicRMW.cpp | 45 case AtomicRMWInst::And: in isIdempotentRMW()
89 case AtomicRMWInst::And: in isSaturating()
|