Home
last modified time | relevance | path

Searched refs:AL_REG_FIELD_SET (Results 1 – 7 of 7) sorted by relevance

/freebsd-13-stable/sys/contrib/alpine-hal/eth/
HDal_hal_eth_kr.c377 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
381 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
391 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
395 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
405 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
409 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
415 AL_REG_FIELD_SET(cfg_lane_1, in al_eth_an_lt_unit_config()
419 AL_REG_FIELD_SET(cfg_lane_1, in al_eth_an_lt_unit_config()
425 AL_REG_FIELD_SET(cfg_lane_2, in al_eth_an_lt_unit_config()
429 AL_REG_FIELD_SET(cfg_lane_2, in al_eth_an_lt_unit_config()
[all …]
HDal_hal_eth_main.c1801 AL_REG_FIELD_SET(if_mode, in al_eth_mac_link_config_10g_mac()
1806 AL_REG_FIELD_SET(if_mode, in al_eth_mac_link_config_10g_mac()
1987 AL_REG_FIELD_SET(val, ETH_10G_MAC_MDIO_CFG_HOLD_TIME_MASK, in al_eth_mdio_config()
2678 AL_REG_FIELD_SET(reg, EC_RFW_HDR_SPLIT_DEF_LEN_MASK, EC_RFW_HDR_SPLIT_DEF_LEN_SHIFT, header_len); in al_eth_rx_header_split_config()
2856 AL_REG_FIELD_SET(val, AL_FIELD_MASK(3,0), 0, entry->prio_sel); in al_eth_fwd_ctrl_entry_to_val()
2857 AL_REG_FIELD_SET(val, AL_FIELD_MASK(7,4), 4, entry->queue_sel_1); in al_eth_fwd_ctrl_entry_to_val()
2858 AL_REG_FIELD_SET(val, AL_FIELD_MASK(9,8), 8, entry->queue_sel_2); in al_eth_fwd_ctrl_entry_to_val()
2859 AL_REG_FIELD_SET(val, AL_FIELD_MASK(13,10), 10, entry->udma_sel); in al_eth_fwd_ctrl_entry_to_val()
2860 AL_REG_FIELD_SET(val, AL_FIELD_MASK(17,15), 15, entry->hdr_split_len_sel); in al_eth_fwd_ctrl_entry_to_val()
3049 AL_REG_FIELD_SET(val, AL_FIELD_MASK(3,0), 0, udma_mask); in al_eth_fwd_mhash_table_set()
[all …]
/freebsd-13-stable/sys/contrib/alpine-hal/
HDal_hal_iofic.c77 AL_REG_FIELD_SET(reg, in al_iofic_moder_res_config()
99 AL_REG_FIELD_SET(reg, in al_iofic_legacy_moder_interval_config()
122 AL_REG_FIELD_SET(reg, in al_iofic_msix_moder_interval_config()
143 AL_REG_FIELD_SET(reg, in al_iofic_msix_tgtid_attributes_config()
HDal_hal_reg_utils.h69 #define AL_REG_FIELD_SET(reg, mask, shift, val) \ macro
89 AL_REG_FIELD_SET(reg, AL_BIT(shift), shift, val)
HDal_hal_serdes_hssp.c1545 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1550 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1562 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1567 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1579 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1584 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1665 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1670 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1682 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1687 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
[all …]
HDal_hal_pcie.c393 AL_REG_FIELD_SET(reg, 0xFFFF, 0, lat_rply_timers->round_trip_lat_limit); in al_pcie_port_lat_rply_timers_config()
394 AL_REG_FIELD_SET(reg, 0xFFFF0000, 16, lat_rply_timers->replay_timer_limit); in al_pcie_port_lat_rply_timers_config()
587 AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_LF_MASK, in al_pcie_port_gen3_params_config()
590 AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_FS_MASK, in al_pcie_port_gen3_params_config()
597 AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_LF_MASK, in al_pcie_port_gen3_params_config()
600 AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_FS_MASK, in al_pcie_port_gen3_params_config()
947 AL_REG_FIELD_SET(reg, 0xF, 0, i); in al_pcie_ecrc_gen_ob_atu_enable()
1369 AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_MASK, in al_pcie_port_operating_mode_config()
2296 AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK, in al_pcie_target_bus_set()
2299 AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_MASK, in al_pcie_target_bus_set()
[all …]
HDal_hal_udma_config.c993 …AL_REG_FIELD_SET(reg, UDMA_S2M_WR_DATA_CFG_2_DESC_WAIT_TIMER_MASK, UDMA_S2M_WR_DATA_CFG_2_DESC_WAI… in al_udma_s2m_no_desc_cfg_set()