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/freebsd-12-stable/secure/lib/libcrypto/aarch64/
Dchacha-armv8.S337 ld1 {v25.4s,v26.4s},[x3]
378 mov v2.16b,v26.16b
380 mov v6.16b,v26.16b
382 mov v18.16b,v26.16b
602 add v2.4s,v2.4s,v26.4s
604 add v6.4s,v6.4s,v26.4s
606 add v18.4s,v18.4s,v26.4s
832 ld1 {v25.4s,v26.4s},[x3]
888 mov v2.16b,v26.16b
890 mov v6.16b,v26.16b
[all …]
Dghashv8-armx.S277 ld1 {v26.2d,v27.2d,v28.2d},[x1] //load twisted H^3, ..., H^4
306 pmull v7.1q,v26.1d,v23.1d //H^3·Ii+1
308 pmull2 v23.1q,v26.2d,v23.2d
368 pmull v7.1q,v26.1d,v23.1d //H^3·Ii+1
371 pmull2 v23.1q,v26.2d,v23.2d
443 pmull v0.1q,v26.1d,v3.1d //H^3·(Xi+Ii)
445 pmull2 v2.1q,v26.2d,v3.2d
Dvpaes-armv8.S108 ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x10] // .Lk_sb1, .Lk_sb2
154 tbl v2.16b, {v26.16b}, v3.16b // vpshufb %xmm3, %xmm14, %xmm2 # 2 = sb2t
252 tbl v2.16b, {v26.16b}, v3.16b // vpshufb %xmm3, %xmm14, %xmm2 # 2 = sb2t
253 tbl v10.16b, {v26.16b}, v11.16b
327 ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x11],#64 // .Lk_dsb9, .Lk_dsbd
376 tbl v4.16b, {v26.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbdu
497 tbl v4.16b, {v26.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbdu
498 tbl v12.16b, {v26.16b}, v10.16b
597 ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x10],#64 // .Lk_dksd, .Lk_dksb
948 tbl v2.16b, {v26.16b}, v4.16b // vpshufb %xmm4, %xmm2, %xmm2
Dpoly1305-armv8.S541 add v11.2s,v11.2s,v26.2s
646 xtn v26.2s,v21.2d
650 bic v26.2s,#0xfc,lsl#24
664 add v11.2s,v11.2s,v26.2s
Dsha512-armv8.S1131 orr v26.16b,v0.16b,v0.16b // offload
1608 add v0.2d,v0.2d,v26.2d // accumulate
/freebsd-12-stable/contrib/gcc/config/rs6000/
Ddarwin-vecsave.asm63 stvx v26,r11,r0
91 lvx v26,r11,r0
121 stvx v26,r11,r0
152 lvx v26,r11,r0
Ddarwin-world.asm145 stvx v26,r11,r12
234 lvx v26,r11,r12
/freebsd-12-stable/contrib/googletest/googletest/include/gtest/
Dgtest-param-test.h612 T26 v26) { in Values() argument
616 v16, v17, v18, v19, v20, v21, v22, v23, v24, v25, v26); in Values()
630 T26 v26, T27 v27) { in Values() argument
634 v15, v16, v17, v18, v19, v20, v21, v22, v23, v24, v25, v26, v27); in Values()
648 T26 v26, T27 v27, T28 v28) { in Values() argument
652 v14, v15, v16, v17, v18, v19, v20, v21, v22, v23, v24, v25, v26, v27, in Values()
667 T26 v26, T27 v27, T28 v28, T29 v29) { in Values() argument
671 v13, v14, v15, v16, v17, v18, v19, v20, v21, v22, v23, v24, v25, v26, in Values()
686 T25 v25, T26 v26, T27 v27, T28 v28, T29 v29, T30 v30) { in Values() argument
691 v26, v27, v28, v29, v30); in Values()
[all …]
/freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
Dtsan_ppc_regs.h91 #define v26 26 macro
Dtsan_rtl_ppc64.S117 stvx v26,0,r5
262 stvx v26,0,r5
/freebsd-12-stable/contrib/llvm-project/lldb/source/Utility/
DARM64_ehframe_Registers.h106 v26, enumerator
DARM64_DWARF_Registers.h107 v26, enumerator
/freebsd-12-stable/contrib/googletest/googletest/include/gtest/internal/
Dgtest-param-util-generated.h1183 T26 v26) : v1_(v1), v2_(v2), v3_(v3), v4_(v4), v5_(v5), v6_(v6), v7_(v7), in ValueArray26() argument
1186 v21_(v21), v22_(v22), v23_(v23), v24_(v24), v25_(v25), v26_(v26) {} in ValueArray26()
1253 T26 v26, T27 v27) : v1_(v1), v2_(v2), v3_(v3), v4_(v4), v5_(v5), v6_(v6), in ValueArray27() argument
1257 v26_(v26), v27_(v27) {} in ValueArray27()
1327 T26 v26, T27 v27, T28 v28) : v1_(v1), v2_(v2), v3_(v3), v4_(v4), v5_(v5), in ValueArray28() argument
1331 v25_(v25), v26_(v26), v27_(v27), v28_(v28) {} in ValueArray28()
1402 T26 v26, T27 v27, T28 v28, T29 v29) : v1_(v1), v2_(v2), v3_(v3), v4_(v4), in ValueArray29() argument
1406 v24_(v24), v25_(v25), v26_(v26), v27_(v27), v28_(v28), v29_(v29) {} in ValueArray29()
1478 T26 v26, T27 v27, T28 v28, T29 v29, T30 v30) : v1_(v1), v2_(v2), v3_(v3), in ValueArray30() argument
1482 v23_(v23), v24_(v24), v25_(v25), v26_(v26), v27_(v27), v28_(v28), in ValueArray30()
[all …]
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterContextFreeBSD_powerpc.cpp160 uint32_t v26[4]; member
DRegisterInfos_arm64.h641 DEFINE_VREG(v26),
675 DEFINE_FPU_PSEUDO(s26, 4, FPU_S_PSEUDO_REG_ENDIAN_OFFSET, v26),
708 DEFINE_FPU_PSEUDO(d26, 8, FPU_D_PSEUDO_REG_ENDIAN_OFFSET, v26),
DRegisterInfos_powerpc.h156 DEFINE_VMX(v26, LLDB_INVALID_REGNUM), \
DRegisterInfos_arm64_sve.h436 DEFINE_VREG_SVE(v26, z26),
DRegisterContextDarwin_arm64.cpp827 case arm64_dwarf::v26: in ConvertRegisterKindToRegisterNumber()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td240 def WR13: Rd<27, "v26:27", [V26, V27, VFR13]>, DwarfRegNum<[174]>;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td390 def D26 : AArch64Reg<26, "d26", [S26], ["v26", ""]>, DwarfRegAlias<B26>;
425 def Q26 : AArch64Reg<26, "q26", [D26], ["v26", ""]>, DwarfRegAlias<B26>;