Searched refs:regLiveIn (Results 1 – 1 of 1) sorted by relevance
142 regLiveIn, enumerator524 setPhysRegState(Reg, regLiveIn); in reloadAtBegin()540 if (RegUnitStates[FirstUnit] == regLiveIn) in reloadAtBegin()1038 case regLiveIn: in dumpState()