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Searched refs:read_reg (Results 1 – 25 of 35) sorted by relevance

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/freebsd-12-stable/sys/dev/igc/
Digc_phy.c32 phy->ops.read_reg = igc_null_read_reg; in igc_init_phy_ops_generic()
141 if (!phy->ops.read_reg) in igc_get_phy_id()
144 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
150 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
301 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); in igc_phy_setup_autoneg()
307 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, in igc_phy_setup_autoneg()
315 ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK << in igc_phy_setup_autoneg()
502 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igc_copper_link_autoneg()
664 if (!hw->phy.ops.read_reg) in igc_set_d3_lplu_state_generic()
667 ret_val = phy->ops.read_reg(hw, IGP02IGC_PHY_POWER_MGMT, &data); in igc_set_d3_lplu_state_generic()
[all …]
Digc_mac.c731 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in igc_config_fc_after_link_up_generic()
734 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in igc_config_fc_after_link_up_generic()
749 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in igc_config_fc_after_link_up_generic()
753 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in igc_config_fc_after_link_up_generic()
Digc_api.c456 if (hw->phy.ops.read_reg) in igc_read_phy_reg()
457 return hw->phy.ops.read_reg(hw, offset, data); in igc_read_phy_reg()
Digc_hw.h389 s32 (*read_reg)(struct igc_hw *, u32, u16 *); member
/freebsd-12-stable/sys/dev/e1000/
De1000_phy.c87 phy->ops.read_reg = e1000_null_read_reg; in e1000_init_phy_ops_generic()
234 if (!phy->ops.read_reg) in e1000_get_phy_id()
238 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in e1000_get_phy_id()
244 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in e1000_get_phy_id()
1021 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_set_master_slave_mode()
1071 ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data); in e1000_copper_link_setup_82577()
1085 ret_val = hw->phy.ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data); in e1000_copper_link_setup_82577()
1130 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_copper_link_setup_m88()
1204 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
1249 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
[all …]
De1000_82541.c104 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82541()
392 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO, in e1000_init_hw_82541()
467 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data); in e1000_get_link_up_info_82541()
474 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data); in e1000_get_link_up_info_82541()
706 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
730 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_config_dsp_after_link_change_82541()
736 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, in e1000_config_dsp_after_link_change_82541()
763 ret_val = phy->ops.read_reg(hw, 0x2F5B, in e1000_config_dsp_after_link_change_82541()
780 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
821 ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data); in e1000_config_dsp_after_link_change_82541()
[all …]
De1000_80003es2lan.c120 phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan; in e1000_init_phy_params_80003es2lan()
598 if (!(hw->phy.ops.read_reg)) in e1000_phy_force_speed_duplex_80003es2lan()
604 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
615 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
654 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, in e1000_phy_force_speed_duplex_80003es2lan()
693 if (!(hw->phy.ops.read_reg)) in e1000_get_cable_length_80003es2lan()
696 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data); in e1000_get_cable_length_80003es2lan()
978 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
997 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
1054 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
[all …]
De1000_82571.c124 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82571()
137 phy->ops.read_reg = e1000_read_phy_reg_m88; in e1000_init_phy_params_82571()
152 phy->ops.read_reg = e1000_read_phy_reg_bm2; in e1000_init_phy_params_82571()
484 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in e1000_get_phy_id_82571()
490 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in e1000_get_phy_id_82571()
879 if (!(phy->ops.read_reg)) in e1000_set_d0_lplu_state_82571()
882 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82571()
894 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82571()
913 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
926 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
[all …]
De1000_82540.c83 phy->ops.read_reg = e1000_read_phy_reg_m88; in e1000_init_phy_params_82540()
431 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_setup_copper_link_82540()
540 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_vco_speed_82540()
549 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
564 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
De1000_ich8lan.c472 phy->ops.read_reg = e1000_read_phy_reg_hv; in e1000_init_phy_params_pchlan()
568 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_ich8lan()
583 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
623 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
1068 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg); in e1000_k1_workaround_lpt_lp()
1782 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
2623 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2800 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2866 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2872 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
[all …]
De1000_82575.c201 phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575; in e1000_init_phy_params_82575()
208 phy->ops.read_reg = e1000_read_phy_reg_82580; in e1000_init_phy_params_82575()
213 phy->ops.read_reg = e1000_read_phy_reg_gs40g; in e1000_init_phy_params_82575()
217 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82575()
289 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1, in e1000_init_phy_params_82575()
767 if (!(hw->phy.ops.read_reg)) in e1000_set_d0_lplu_state_82575()
770 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82575()
782 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
800 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
813 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
[all …]
De1000_82543.c111 phy->ops.read_reg = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
803 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
807 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
1412 if (!(hw->phy.ops.read_reg)) in e1000_config_mac_to_phy_82543()
1424 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_config_mac_to_phy_82543()
De1000_mac.c1397 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1400 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1415 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in e1000_config_fc_after_link_up_generic()
1419 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up_generic()
De1000_api.c1037 if (hw->phy.ops.read_reg) in e1000_read_phy_reg()
1038 return hw->phy.ops.read_reg(hw, offset, data); in e1000_read_phy_reg()
/freebsd-12-stable/sys/dev/iicbus/
Dnxprtc.c293 read_reg(struct nxprtc_softc *sc, uint8_t reg, uint8_t *val) in read_reg() function
320 if ((err = read_reg(sc, sc->secaddr, &sec)) != 0) in read_timeregs()
322 if ((err = read_reg(sc, sc->tmcaddr, &tmr1)) != 0) in read_timeregs()
324 if ((err = read_reg(sc, sc->tmcaddr, &tmr2)) != 0) in read_timeregs()
422 if ((err = read_reg(sc, PCF8523_R_CS3, &cs3)) != 0) { in pcf8523_battery_check()
534 err = read_reg(sc, PCF2127_R_AGING_OFFSET, &freqadj); in pcf8523_start()
568 if ((err = read_reg(sc, PCF8523_R_TMR_A_FREQ, &tmrfreq)) != 0) in pcf8523_start_timer()
570 if ((err = read_reg(sc, PCF8523_R_TMR_CLKOUT, &clkout)) != 0) in pcf8523_start_timer()
600 if ((err = read_reg(sc, PCF2127_R_TMR_CTL, &tmrctl)) != 0) in pcf2127_start_timer()
667 if ((err = read_reg(sc, PCF8563_R_TMR_CTRL, &tmrctl)) != 0) in pcf8563_start_timer()
[all …]
Dds13rtc.c206 read_reg(struct ds13rtc_softc *sc, uint8_t reg, uint8_t *val) in read_reg() function
314 if (read_reg(sc, sc->osfaddr, &statreg) != 0) { in ds13rtc_start()
329 if (read_reg(sc, sc->secaddr + 2, &statreg) != 0) { in ds13rtc_start()
358 if ((err = read_reg(sc, sc->osfaddr, &statreg)) != 0) { in ds13rtc_gettime()
459 if ((err = read_reg(sc, sc->osfaddr, &statreg)) != 0) in ds13rtc_settime()
/freebsd-12-stable/sys/dev/ixgbe/
Dixgbe_phy.c257 phy->ops.read_reg = ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic()
303 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_probe_phy()
409 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_validate_phy_addr()
433 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_get_phy_id()
439 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, in ixgbe_get_phy_id()
535 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
547 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
584 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, in ixgbe_restart_auto_neg()
818 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic()
831 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
[all …]
Dixgbe_x550.c503 hw->phy.ops.read_reg = NULL; in ixgbe_identify_phy_fw()
1976 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em()
1985 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG, in ixgbe_get_lasi_ext_t_x550em()
1995 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1, in ixgbe_get_lasi_ext_t_x550em()
2009 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG, in ixgbe_get_lasi_ext_t_x550em()
2025 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em()
2033 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2, in ixgbe_get_lasi_ext_t_x550em()
2075 status = hw->phy.ops.read_reg(hw, in ixgbe_enable_lasi_ext_t_x550em()
2093 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, in ixgbe_enable_lasi_ext_t_x550em()
2111 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK, in ixgbe_enable_lasi_ext_t_x550em()
[all …]
Dixgbe_82598.c616 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, in ixgbe_validate_link_ready()
660 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598()
661 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598()
662 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV, in ixgbe_check_mac_link_82598()
674 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598()
677 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598()
1245 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82598()
/freebsd-12-stable/sys/dev/sume/
Dif_sume.c169 read_reg(struct sume_adapter *adapter, int offset) in read_reg() function
332 vect0 = read_reg(adapter, RIFFA_IRQ_REG0_OFF); in sume_intr_handler()
379 len = read_reg(adapter, RIFFA_CHNL_REG(ch, in sume_intr_handler()
432 recv->offlast = read_reg(adapter, in sume_intr_handler()
435 recv->len = read_reg(adapter, RIFFA_CHNL_REG(ch, in sume_intr_handler()
496 len = read_reg(adapter, RIFFA_CHNL_REG(ch, in sume_intr_handler()
533 read_reg(adapter, RIFFA_CHNL_REG(ch, in sume_intr_handler()
631 reg = read_reg(adapter, RIFFA_INFO_REG_OFF); in sume_probe_riffa_pci()
1392 read_reg(adapter, RIFFA_INFO_REG_OFF); in sume_local_timer()
1468 read_reg(adapter, RIFFA_INFO_REG_OFF); in sume_attach()
/freebsd-12-stable/contrib/gdb/gdb/
Ddwarf2expr.c442 result = (ctx->read_reg) (ctx->baton, op - DW_OP_breg0); in execute_stack_op()
450 result = (ctx->read_reg) (ctx->baton, reg); in execute_stack_op()
473 result = (ctx->read_reg) (ctx->baton, result); in execute_stack_op()
Ddwarf2expr.h40 CORE_ADDR (*read_reg) (void *baton, int regnum); member
Ddwarf2-frame.c206 read_reg (void *baton, int reg) in read_reg() function
249 ctx->read_reg = read_reg; in execute_stack_op()
259 result = read_reg (next_frame, result); in execute_stack_op()
635 cache->cfa = read_reg (next_frame, fs->cfa_reg); in dwarf2_frame_cache()
Ddwarf2loc.c226 ctx->read_reg = dwarf_expr_read_reg; in dwarf2_evaluate_loc_desc()
344 ctx->read_reg = needs_frame_read_reg; in dwarf2_loc_desc_needs_frame()
/freebsd-12-stable/sys/dev/flash/
Dqspi_if.m70 METHOD int read_reg {

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