Home
last modified time | relevance | path

Searched refs:pin (Results 1 – 25 of 694) sorted by relevance

12345678910>>...28

/freebsd-12-stable/sys/gnu/dts/arm/
Dexynos4415-pinctrl.dtsi2 * Samsung's Exynos4415 SoCs pin-mux and pin-config device tree source
6 * Samsung's Exynos4415 SoCs pin-mux and pin-config optiosn are listed as device
97 samsung,pin-function = <0x2>;
98 samsung,pin-pud = <0>;
99 samsung,pin-drv = <0>;
104 samsung,pin-function = <2>;
105 samsung,pin-pud = <0>;
106 samsung,pin-drv = <0>;
111 samsung,pin-function = <2>;
112 samsung,pin-pud = <0>;
[all …]
Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Dexynos4x12-pinctrl.dtsi2 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
7 * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
20 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
21 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
132 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
133 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
134 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
139 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
140 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
141 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
[all …]
Dexynos4412-pinctrl.dtsi3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
[all …]
Ds5pv210-pinctrl.dtsi274 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
275 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
276 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
281 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
282 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
283 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
288 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
289 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
290 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
295 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
[all …]
Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
136 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
142 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
25 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
26 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
27 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
33 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
34 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
[all …]
Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
/freebsd-12-stable/sys/gnu/dts/arm64/exynos/
Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
136 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
141 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
142 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/freebsd-12-stable/sys/arm/mv/
Dgpio.c103 int pin; member
411 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep) in mv_gpio_setup_intrhandler() argument
420 if (pin < 0 || pin >= sc->pin_num) in mv_gpio_setup_intrhandler()
422 event = sc->gpio_events[pin]; in mv_gpio_setup_intrhandler()
425 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_DEBOUNCE) { in mv_gpio_setup_intrhandler()
426 error = mv_gpio_debounce_init(dev, pin); in mv_gpio_setup_intrhandler()
431 } else if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE) in mv_gpio_setup_intrhandler()
432 mv_gpio_double_edge_init(dev, pin); in mv_gpio_setup_intrhandler()
434 error = intr_event_create(&event, (void *)s, 0, pin, in mv_gpio_setup_intrhandler()
439 "gpio%d:", pin); in mv_gpio_setup_intrhandler()
[all …]
/freebsd-12-stable/sys/arm/xilinx/
Dzy7_gpio.c139 zy7_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) in zy7_gpio_pin_getcaps() argument
142 if (!VALID_PIN(pin)) in zy7_gpio_pin_getcaps()
152 zy7_gpio_pin_getname(device_t dev, uint32_t pin, char *name) in zy7_gpio_pin_getname() argument
155 if (!VALID_PIN(pin)) in zy7_gpio_pin_getname()
158 if (pin < NUM_MIO_PINS) { in zy7_gpio_pin_getname()
159 snprintf(name, GPIOMAXNAME, "MIO_%d", pin); in zy7_gpio_pin_getname()
162 snprintf(name, GPIOMAXNAME, "EMIO_%d", pin - EMIO_PIN); in zy7_gpio_pin_getname()
171 zy7_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) in zy7_gpio_pin_getflags() argument
175 if (!VALID_PIN(pin)) in zy7_gpio_pin_getflags()
180 if ((RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) & (1 << (pin & 31))) != 0) { in zy7_gpio_pin_getflags()
[all …]
/freebsd-12-stable/sys/dev/amdgpio/
Damdgpio.c78 amdgpio_is_pin_output(struct amdgpio_softc *sc, uint32_t pin) in amdgpio_is_pin_output() argument
86 reg = AMDGPIO_PIN_REGISTER(pin); in amdgpio_is_pin_output()
124 amdgpio_valid_pin(struct amdgpio_softc *sc, int pin) in amdgpio_valid_pin() argument
126 dprintf("pin %d\n", pin); in amdgpio_valid_pin()
130 if ((sc->sc_gpio_pins[pin].gp_pin == pin) && in amdgpio_valid_pin()
131 (sc->sc_gpio_pins[pin].gp_caps != 0)) in amdgpio_valid_pin()
138 amdgpio_pin_getname(device_t dev, uint32_t pin, char *name) in amdgpio_pin_getname() argument
142 dprintf("pin %d\n", pin); in amdgpio_pin_getname()
145 if (!amdgpio_valid_pin(sc, pin)) in amdgpio_pin_getname()
149 snprintf(name, GPIOMAXNAME, "%s", sc->sc_gpio_pins[pin].gp_name); in amdgpio_pin_getname()
[all …]
/freebsd-12-stable/sys/gnu/dts/arm64/actions/
Ds900-bubblegum-96.dts69 * NC = not connected (pin out but not routed from the chip to
71 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
100 "GPIO-G", /* GPIO_6, LSEC pin 29 */
101 "GPIO-H", /* GPIO_7, LSEC pin 30 */
[all …]
/freebsd-12-stable/sys/amd64/vmm/io/
Dvioapic.c99 vioapic_send_intr(struct vioapic *vioapic, int pin) in vioapic_send_intr() argument
105 KASSERT(pin >= 0 && pin < REDIR_ENTRIES, in vioapic_send_intr()
106 ("vioapic_set_pinstate: invalid pin number %d", pin)); in vioapic_send_intr()
111 low = vioapic->rtbl[pin].reg; in vioapic_send_intr()
112 high = vioapic->rtbl[pin].reg >> 32; in vioapic_send_intr()
115 VIOAPIC_CTR1(vioapic, "ioapic pin%d: masked", pin); in vioapic_send_intr()
123 vioapic->rtbl[pin].reg |= IOART_REM_IRR; in vioapic_send_intr()
131 vioapic_set_pinstate(struct vioapic *vioapic, int pin, bool newstate) in vioapic_set_pinstate() argument
136 KASSERT(pin >= 0 && pin < REDIR_ENTRIES, in vioapic_set_pinstate()
137 ("vioapic_set_pinstate: invalid pin number %d", pin)); in vioapic_set_pinstate()
[all …]
/freebsd-12-stable/sys/arm/allwinner/
Daw_gpio.c265 uint32_t pin; member
328 static int aw_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value);
329 static int aw_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
330 static int aw_gpio_pin_get_locked(struct aw_gpio_softc *sc, uint32_t pin, unsigned int *value);
331 static int aw_gpio_pin_set_locked(struct aw_gpio_softc *sc, uint32_t pin, unsigned int value);
345 aw_gpio_get_function(struct aw_gpio_softc *sc, uint32_t pin) in aw_gpio_get_function() argument
352 if (pin > sc->conf->padconf->npins) in aw_gpio_get_function()
354 bank = sc->conf->padconf->pins[pin].port; in aw_gpio_get_function()
355 pin = sc->conf->padconf->pins[pin].pin; in aw_gpio_get_function()
356 offset = ((pin & 0x07) << 2); in aw_gpio_get_function()
[all …]
/freebsd-12-stable/lib/libgpio/
Dgpio.c122 gpio_pin_set_name(gpio_handle_t handle, gpio_pin_t pin, char *name) in gpio_pin_set_name() argument
129 gppin.gp_pin = pin; in gpio_pin_set_name()
153 gpio_pin_get(gpio_handle_t handle, gpio_pin_t pin) in gpio_pin_get() argument
158 gpreq.gp_pin = pin; in gpio_pin_get()
166 gpio_pin_set(gpio_handle_t handle, gpio_pin_t pin, gpio_value_t value) in gpio_pin_set() argument
173 gpreq.gp_pin = pin; in gpio_pin_set()
182 gpio_pin_toggle(gpio_handle_t handle, gpio_pin_t pin) in gpio_pin_toggle() argument
187 gpreq.gp_pin = pin; in gpio_pin_toggle()
195 gpio_pin_low(gpio_handle_t handle, gpio_pin_t pin) in gpio_pin_low() argument
197 return (gpio_pin_set(handle, pin, GPIO_VALUE_LOW)); in gpio_pin_low()
[all …]
/freebsd-12-stable/sys/dev/rccgpio/
Drccgpio.c54 uint32_t pin; member
60 { .pin = (1 << 11), .name = "reset switch", .caps = GPIO_PIN_INPUT },
61 { .pin = (1 << 15), .name = "red LED", .caps = GPIO_PIN_OUTPUT },
62 { .pin = (1 << 17), .name = "green LED", .caps = GPIO_PIN_OUTPUT },
64 { .pin = (1 << 16), .name = "HD1 LED", .caps = GPIO_PIN_OUTPUT },
65 { .pin = (1 << 18), .name = "HD2 LED", .caps = GPIO_PIN_OUTPUT },
124 rcc_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) in rcc_gpio_pin_getcaps() argument
129 if (pin >= sc->sc_gpio_npins) in rcc_gpio_pin_getcaps()
132 *caps = rcc_pins[pin].caps; in rcc_gpio_pin_getcaps()
138 rcc_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) in rcc_gpio_pin_getflags() argument
[all …]
/freebsd-12-stable/sys/mips/ingenic/
Djz4780_gpio.c136 jz4780_gpio_pin_set_func(struct jz4780_gpio_softc *sc, uint32_t pin, in jz4780_gpio_pin_set_func() argument
139 uint32_t mask = (1u << pin); in jz4780_gpio_pin_set_func()
155 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); in jz4780_gpio_pin_set_func()
156 sc->pins[pin].pin_func = (enum pin_function)func; in jz4780_gpio_pin_set_func()
162 uint32_t pin, uint32_t dir) in jz4780_gpio_pin_set_direction() argument
164 uint32_t mask = (1u << pin); in jz4780_gpio_pin_set_direction()
168 if (sc->pins[pin].pin_caps & dir) in jz4780_gpio_pin_set_direction()
174 if (sc->pins[pin].pin_caps & dir) in jz4780_gpio_pin_set_direction()
181 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); in jz4780_gpio_pin_set_direction()
182 sc->pins[pin].pin_flags |= dir; in jz4780_gpio_pin_set_direction()
[all …]
/freebsd-12-stable/usr.sbin/bhyve/
Dpci_irq.c91 pirq_read(int pin) in pirq_read() argument
94 assert(pin > 0 && pin <= nitems(pirqs)); in pirq_read()
95 return (pirqs[pin - 1].reg); in pirq_read()
99 pirq_write(struct vmctx *ctx, int pin, uint8_t val) in pirq_write() argument
103 assert(pin > 0 && pin <= nitems(pirqs)); in pirq_write()
104 pirq = &pirqs[pin - 1]; in pirq_write()
201 int best_count, best_irq, best_pin, irq, pin; in pirq_alloc_pin() local
207 best_pin = (4 + pi->pi_slot + pi->pi_lintr.pin) % 8; in pirq_alloc_pin()
212 for (pin = 1; pin < nitems(pirqs); pin++) { in pirq_alloc_pin()
213 if (pirqs[pin].use_count < best_count) { in pirq_alloc_pin()
[all …]

12345678910>>...28